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U4460BG Datasheet(PDF) 3 Page - TEMIC Semiconductors |
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U4460BG Datasheet(HTML) 3 Page - TEMIC Semiconductors |
3 / 9 page TELEFUNKEN Semiconductors U4460BG Preliminary Information Rev. A1: 15.08.1995 3 (9) FPLL, VCO and AFC The FPLL circuit (frequency phase locked loop) consists of a frequency and phase detector to generate control voltage for the VCO tuning. In the locked mode the VCO is controlled by the phase detector and in unlocked mode the frequency detector is superimposed. The VCO operates with an external resonance circuit (L and C par- allel) and is controlled by internal varicaps. The VCO control voltage is also converted to a current and represents the AFC output signal at Pin 23. A practicable VCO alignment of the external coil is the adjustment to zero AFC output current at Pin 23. At centre frequency the AFC output current is equal to zero. The optional potentiometer at Pin 27 allows an offset compensation of the VCO phase for improved sound quality (fine adjustment). Without a potentiometer (open circuit at Pin 27) this offset compensation is not active. The oscillator signal passes a phase shifter and supplies the in–phase signal (0) and the quadrature signal (90) of the generated picture carrier. Video demodulation and amplifier The video IF signal, which is applied from the gain controlled IF amplifier, is multiplied with the inphase component of the VCO signal. The video demodulator is designed for low distortion and large bandwidth. The demodulator output signal passes an integrated low pass filter for attenuation of the residual vision carrier and is fed to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and 8 MHz bandwidth (–3dB). The video signal is fed to VIF– AGC and to the video output buffer. This amplifier with 6dB gain offers easy adaption of the sound trap. For nominal video IF modulation the video output signal at Pin 13 is 2 V (peak to peak value). Internal voltage stabilizer The internal bandgap reference ensures constant performance independant of supply voltage and temperature. Absolute maximum values Reference point pin 3 (8, 17), unless otherwise specified Parameters Symbol Value Unit Supply voltage Pin 24 Vs 9.0 V Supply current Pin 24 Is 85 mA Power dissipation, Vs = + 9 V P 765 mW Output currents Pin 13 Iout 5 mA External voltages Pin 5, 6, 7, 11, 13, 18, 19, 27 Vext + 4.5 V Pin 20,21 + 3.5 V Pin 12 + 13.5 V Pin 20,23 Vs V Junction temperature Tjunc +125 °C Storage temperature Tstor –25 to +125 °C Electrostatic handling *) all pins VESD t.b.f. V *) Equivalent to discharging a 200 pF capacitor through a 0 resistor Operating range Parameters Symbol Value Unit Supply voltage range Pin25 Vs 4.5 to 9.0 V Ambient temperature Tamb 0 to +85 °C |
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