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MM74HC03J Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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MM74HC03J Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 4 page TLF5295 January 1988 MM54HC03MM74HC03 Quad 2-Input Open Drain NAND Gate General Description These NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits All gates have buffered outputs All de- vices have high noise immunity and the ability to drive 10 LS-TTL loads The 54HC74HC logic family is functionally as well as pin-out compatible with the standard 54LS74LS logic family All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground As with standard 54HC74HC push-pull outputs there are diodes to both VCC and ground Therefore the output should not be pulled above VCC as it would be clamped to one diode voltage above VCC This diode is added to enhance electrostatic protection Features Y Typical propagation delay 12 ns Y Wide power supply range 2 – 6V Y Low quiescent current 20 mA maximum (74HC Series) Y Low input current 1 mA maximum Y Fanout of 10 LS-TTL loads Connection and Logic Diagrams Dual-In-Line Package TLF5295 – 1 Top View Order Number MM54HC03 or MM74HC03 TLF5295 – 2 C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
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