IC61LV5128

Integrated Circuit Solution, Inc.

3

AHSR021-0A

09/11/2001

PIN CONFIGURATION

36-Pin SOJ

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

NC

NC

A0

A1

A2

A3

A4

CE

I/O0

I/O1

Vcc

GND

I/O2

I/O3

WE

A5

A6

A7

A8

A9

NC

NC

NC

NC

NC

A18

A17

A16

A15

OE

I/O7

I/O6

GND

Vcc

I/O5

I/O4

A14

A13

A12

A11

A10

NC

NC

NC

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

A0

A1

A2

A3

A4

CE

I/O0

I/O1

Vcc

GND

I/O2

I/O3

WE

A5

A6

A7

A8

A9

NC

A18

A17

A16

A15

OE

I/O7

I/O6

GND

Vcc

I/O5

I/O4

A14

A13

A12

A11

A10

NC

PIN CONFIGURATION

44-Pin TSOP-2

PIN DESCRIPTIONS

A0-A18

Address Inputs

CE

Chip Enable Input

OE

Output Enable Input

WE

Write Enable Input

I/O0-I/O7

Input/Output

Vcc

Power

GND

Ground

NC

No Connection

TRUTH TABLE

Mode

WE

WE

WE

WE

WE

CE

CE

CE

CE

CE

OE

OE

OE

OE

OE

I/O Operation

Vcc Current

Not Selected

X

H

X

High-Z

(Power-down)

Output Disabled

H

L

H

High-Z

Read

H

L

L

Write

L

L

X

Symbol

Parameter

Value

Unit

Terminal Voltage with Respect to GND

–0.5 to Vcc + 0.5 V

Temperature Under Bias

–55 to +125

°C

Storage Temperature

–65 to +150

°C

Power Dissipation

1.0

W

Notes:

1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent

damage to the device. This is a stress rating only and functional operation of the device at these or any

other conditions above those indicated in the operational sections of this specification is not implied.

Exposure to absolute maximum rating conditions for extended periods may affect reliability.