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Document Number: 10135

82

Revision: 18-Jan-05

FX5959G701

Vishay

PIN DESCRIPTION

PIN

DESCRIPTION

SD

Logic low on SD pin shuts down the Current Source completely and decreases current consumption to less than 1uA

PWM/PSM

Logic high =PWM mode, logic low =PSM mode. In PSM mode synchronous rectification is disabled.

SYNC

Externally controlled synchronization signal. Logic high to low transition forces the clock synchronization.

If not used must be connected to Vin or logic high.

Vin

Input supply voltage

GND

Ground

R1

Included inside the package for fixed voltage. To be added externally for all self-selected voltages.

Voltage test point. To test the minimum gap above VL.

R0

To be added externally for selected output current.

Output current. LED connection

Vin

SD

PWM/PSM

SYNC

GND

R1

R0

R1

R0