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M2052-11I625.0000 Datasheet(PDF) 8 Page - Integrated Circuit Systems |
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M2052-11I625.0000 Datasheet(HTML) 8 Page - Integrated Circuit Systems |
8 / 12 page M2050/51/52 Datasheet Rev 1.0 8 of 12 Revised 23Jun2005 Integrate d Circu it Systems, Inc. ● Communications Modules ● www.ics t.com ● tel (508) 852-5400 Integrated Circuit Systems, Inc. M2050/51/52 SAW PLL FOR 10GBE 64B/66B FEC Preliminar y In f o r m atio n External Loop Filter To provide stable PLL operation, the M2050/51/52 requires the use of an external loop filter. This is provided via the provided filter pins (see Figure 5). Due to the differential signal path design, the implementation requires two identical complementary RC filters as shown here. Figure 5: External Loop Filter PLL bandwidth is affected by the “Mfec” value and the “Mfin” value, as well as the VCSO frequency. The FEC_SEL setting can be used to actively change PLL loop bandwidth in a given application. See “Mfec and Rfec Divider Look-Up Tables (LUTs)” on pg. 3. See Tables 9, 10, and 11, Example External Loop Filter Component Values, on pg. 8. PLL Simulator Tool Available A free PC software utility is available on the ICS website (www.icst.com). The M2000 Timing Modules PLL Simulator is a downloadable application that simulates PLL jitter and wander transfer characteristics. This enables the user to set appropriate external loop component values in a given application. Refer to the M2050/51/52 product web page at www.icst.com/products/summary/m2050-2052.htm for additional product information. C POST C POST VC nVC R POST nOP_OUT OP_OUT R POST R LOOP R LOOP C LOOP C LOOP OP_IN nOP_IN 6 7 5 49 8 Example External Loop Filter Component Values for M2050-11-644.5313 and M2050-11-669.6429 VCSO Parameters: KVCO = 800kHz/V, RIN = 100kΩ (pin NBW = 0), VCSO Bandwidth = 700kHz. Device Configuration Example Loop Filter Component Values Nominal Performance With Values F Ref (MHz) F VCSO (MHz) FIN_ FEC_ ... SEL1:0 Mfin M R Phase Det. Freq. (MHz) R Loop C Loop R Post C Post PLL Loop Bandwidth Damping Factor Passband Peaking (dB) Post Filter Bandwidth 125.00 644.5313 0 1 0 0 5 33 32 3.9063 61.9k Ω 1.0µF 59.0kΩ 1000pF 577Hz 6.8 0.043 2.7kHz 125.00 669.6429 0 1 1 0 5 15 14 8.9286 44.2k Ω 1.0µF 38.3kΩ 1000pF 908Hz 7.2 0.039 4.1kHz Table 9: Example External Loop Filter Component Values for M2050-11-644.5313 and M2050-11-669.6429 Example External Loop Filter Component Values for M2051-11-625.0000 VCSO Parameters: KVCO = 800kHz/V, RIN = 100kΩ (pin NBW = 0), VCSO Bandwidth = 700kHz. Device Configuration Example Loop Filter Component Values Nominal Performance With Values F Ref (MHz) F VCSO (MHz) FIN_ FEC_ ...SEL1:0 Mfin M R Phase Det. Freq. (MHz) R Loop C Loop R Post C Post PLL Loop Bandwidth Damping Factor Passband Peaking (dB) Post Filter Bandwidth 644.5313 625.0000 1 1 0 0 32 33 19.5313 28.0k Ω 1.0µF 15.0kΩ 1000pF 1.25kHz 7.0 0.04 10.6kHz Table 10: Example External Loop Filter Component Values for M2051-11-625.0000 Example External Loop Filter Component Values1 for M2052-11-644.5313 VCSO Parameters: KVCO = 800kHz/V, RIN = 100kΩ (pin NBW = 0), VCSO Bandwidth = 700kHz. Device Configuration Example Loop Filter Component Values Nominal Performance With Values F Ref (MHz) F VCSO (MHz) FIN_ FEC_ ...SEL1:0 Mfin M R Phase Det. Freq. (MHz) R Loop C Loop R Post C Post PLL Loop Bandwidth Damping Factor Passband Peaking (dB) Post Filter Bandwidth 693.4830 644.5313 1 1 0 0 1 79 85 8.1586 51.0k Ω 1.0µF 33.2kΩ 1000pF 986Hz 8.1 0.031 4.8kHz Table 11: Example External Loop Filter Component Values for M2052-11-644.5313 Note 1: K VCO , VCSO Bandwidth, Mfin x Mfec Divider Value, and External Loop Filter Component Values determine Loop Bandwidth, Damping Factor, and Passband Peaking. For PLL Simulator software, go to www.icst.com. |
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