M1033/34 Datasheet Rev 1.0

9 of 14

Revised 07Apr2005

M1033/34

Prod uct Data Sh eet

Integrated

Circuit

Systems, Inc.

External Loop Filter

To provide stable PLL operation, the M1033/34 requires

the use of an external loop filter. This is provided via the

provided filter pins (see Figure 5).

Due to the differential signal path design, the

implementation requires two identical complementary

RC filters as shown here.

Figure 5: External Loop Filter

See Table 7, Example External Loop Filter Component

Values, below.

PLL Bandwidth is affected by loop filter component

values, the “M” value, and the “PLL Loop Constants”

listed in AC Characteristics on pg. 12.

PLL loop bandwidth in a given application. See “M and

R Divider Look-Up Tables (LUT)” on pg. 3.

PLL Simulator Tool Available

A free PC software utility is available on the ICS website

(www.icst.com). The M2000 Timing Modules PLL

Simulator is a downloadable application that simulates

PLL jitter and wander transfer characteristics. This

enables the user to set appropriate external loop

component values in a given application.

For guidance on device or loop filter implementa-

tion, contact CMBU (Commercial Business Unit)

Product Applications at (508) 852-5400.

C

POST

C

POST

VC

nVC

R

POST

nOP_OUT

OP_OUT

R

POST

R

LOOP

R

LOOP

C

LOOP

C

LOOP

OP_IN

nOP_IN

6

7

5

49

8

for M1033-yz-155.5200 and M1034-yz-155.5200

Device Configuration

Example External Loop Filter Comp. Values

Nominal Performance Using These Values

F

REF

(MHz)

F

VCSO

(MHz)

MR_SEL3:0

MDiv NBW

R

LOOP

C

LOOP

R

POST

C

POST

PLL Loop

Bandwidth

Damping

Factor

Passband

155.52

0 0 0 0

8

0

6.8

k

Ω

10

µF

82

k

Ω

1000

pF

315

Hz

5.4

0.068

155.52

0 0 0 1

16

0

12

k

Ω

10

µF

82k

Ω

1000

pF

270

Hz

6.7

0.044

155.52

0 1 0 1

8

0

6.8

k

Ω

10

µF

82k

Ω

1000

pF

315

Hz

5.4

0.068

155.52

0 1 1 0

32

0

22

k

Ω

4.7

µF

82k

Ω

1000

pF

250

Hz

6.0

0.05

155.52

1 0 1 0

16

0

12

k

Ω

10

µF

82k

Ω

1000

pF

270

Hz

6.7

0.044

155.52

1 0 1 1

64

0

47

k

Ω

2.2

µF

82k

Ω

1000

pF

266

Hz

6.2

0.05

Table 7: Example External Loop Filter Component Values

Note 1: K

and Passband Peaking. For PLL Simulator software, go to www.icst.com.

Note 2: This row is for the M1033 only.

Note 3: This row is for the M1034 only.

Note 4: Optimal for system clock filtering.

Note 5: Optimal for loop timing mode or where high input jitter tolerance is needed, phase detector frequency is 4.86 MHz.

Note 6: Optimal for loop timing mode or where high input jitter tolerance is needed, phase detector frequency is 2.43 MHz.