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ATF-511P8-TR1 Datasheet(PDF) 3 Page - Agilent(Hewlett-Packard) |
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ATF-511P8-TR1 Datasheet(HTML) 3 Page - Agilent(Hewlett-Packard) |
3 / 16 page 3 ATF-511P8 Electrical Specifications TA = 25°C, DC bias for RF parameters is Vds = 4.5V and Ids = 200 mA unless otherwise specified. Symbol Parameter and Test Condition Units Min. Typ. Max. Vgs Operational Gate Voltage Vds = 4.5V, Ids = 200 mA V 0.25 0.51 0.8 Vth Threshold Voltage Vds = 4.5V, Ids = 32 mA V — 0.28 — Idss Saturated Drain Current Vds = 4.5V, Vgs = 0V µA — 16.4 — Gm Transconductance Vds = 4.5V, Gm = ∆Idss/∆Vgs; mmho — 2178 — ∆Vgs = Vgs1 – Vgs2 Vgs1 = 0.55V, Vgs2 = 0.5V Igss Gate Leakage Current Vds = 0V, Vgs = -4.5V µA -27 -2 — NF Noise Figure[1] f = 2 GHz dB — 1.4 — f = 900 MHz dB — 1.2 — G Gain[1] f = 2 GHz dB 13.5 14.8 16.5 f = 900 MHz dB — 17.8 — OIP3 Output 3rd Order Intercept Point[1,2] f = 2 GHz dBm 38.5 41.7 — f = 900 MHz dBm — 43 — P1dB Output 1dB Compressed[1] f = 2 GHz dBm 28.5 30 — f = 900 MHz dBm — 29.6 — PAE Power Added Efficiency f = 2 GHz % 52 68.9 — f = 900 MHz % — 68.6 — ACLR Adjacent Channel Leakage Offset BW = 5 MHz dBc — -58.9 — Power Ratio[1,3] Offset BW = 10 MHz dBc — -62.7 — Notes: 1. Measurements obtained using production test board described in Figure 6 and PAE tested at P1dB condition. 2. I ) 2 GHz OIP3 test condition: F1 = 2.0 GHz, F2 = 2.01 GHz and Pin = -5 dBm per tone. II ) 900 MHz OIP3 test condition: F1 = 900 MHz, F2 = 910 MHz and Pin = -5 dBm per tone. 3. ACLR test spec is based on 3GPP TS 25.141 V5.3.1 (2002-06) - Test Model 1 - Active Channels: PCCPCH + SCH + CPICH + PICH + SCCPCH + 64 DPCH (SF=128) - Freq = 2140 MHz - Pin = -5 dBm - Channel Integrate Bandwidth = 3.84 MHz 4. Use proper bias, board, heatsink and derating designs to ensure maximum channel temperature is not exceeded. See absolute maximum ratings and application note for more details. Input 50 Ohm Transmission Line and Gate Bias T (0.3 dB loss) Input Matching Circuit Γ_mag = 0.69 Γ_ang = -164° (1.1 dB loss) Output Matching Circuit Γ_mag = 0.65 Γ_ang = -163° (0.9 dB loss) DUT 50 Ohm Transmission Line and Drain Bias T (0.3 dB loss) Output Figure 6. Block diagram of the 2 GHz production test board used for NF, Gain, OIP3 , P1dB and PAE and ACLR measurements. This circuit achieves a trade-off between optimal OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements. |
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