HY62V8100BLLR1 datasheet(8/12 Pages) HYNIX

Part #	HY62V8100BLLR1

Description	128K x8 bit 3.3V Low Power CMOS slow SRAM

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Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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HY62V8100B Series

Rev 13 / Apr. 2001

7

DATA RETENTION ELECTRIC CHARACTERISTIC

TA=0

°C to 70°C / -25°C to 85°C (E) / -25¡ Éto 85¡ É(I)

Sym

Parameter

Test Condition

Min

Typ

Max

Unit

VDR

Vcc for Data Retention

/CS1>Vcc-0.2V or CS2<0.2V,

VIN > Vcc-0.2V or VIN < Vss+0.2V

2.0

-

V

ICCDR

Data

HY62V8100B

Vcc=3.0V,

-

0.5

10

uA

Retention

HY62V8100B-E

/CS1>Vcc - 0.2V or CS2<0.2V,

-

0.5

15

uA

Current

HY62V8100B-I

VIN > Vcc-0.2V or VIN > Vss+0.2V

-

0.5

15

uA

tCDR

Chip Deselect to Data

Retention Time

See Data Retention Timing

Diagram

0

-

ns

tR

Operating Recovery Time

tRC(2)

-

ns

Notes:

1. Typical values are under the condition of TA = 25

°C.

2. tRC is read cycle time.

DATA RETENTION TIMING DIAGRAM 1

CS1

VDR

CS1>VCC-0.2V

tCDR

tR

VSS

VCC

3.0V

2.2V

DATA RETENTION MODE

DATA RETENTION TIMING DIAGRAM 2

0.4V

VDR

tCDR

tR

VSS

VCC

CS2

3.0V

DATA RETENTION MODE

CS2<0.2V

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HY62V8100BLLR1 Datasheet(PDF) 8 Page - Hynix Semiconductor

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