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MX69F162C3BTXBI-90 Datasheet(PDF) 11 Page - Macronix International

Part # MX69F162C3BTXBI-90
Description  16M-BIT [X16] FLASH AND 2M-BIT/4M-BIT [X16] SRAM MIXED MULTI CHIP PACKAGE MEMORY
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Manufacturer  MCNIX [Macronix International]
Direct Link  http://www.macronix.com
Logo MCNIX - Macronix International

MX69F162C3BTXBI-90 Datasheet(HTML) 11 Page - Macronix International

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P/N:PM1083
MX69F162/164C3BT/B
REV. 0.2, MAY 20, 2004
In read modes, RESET#-low deselects the memory,
places output drivers in a high-impedance state and turns
off all internal circuits. RESET# must be held low for a
minimum of 100ns. Time tPHQV is required after return
from reset mode until initial memory access outputs are
valid. After this wake-up interval tPHEL or tPHWL, nor-
mal operation is restored. The CUI is reset to read array
mode and status register is set to 80H. Sector lock bit is
set at lock status.
During sector erase, word write or sector lock/unlock
modes, RESET#-low will abort the operation. Memory con-
tents being altered are no longer valid; the data may be
partially erased or written.
In addition, CUI will go into either array read mode or
erase/write interrupted mode. When power is up and the
device reset subsequently, it is necessary to read sta-
tus register in order to assure the status of the device.
Recognizing status register (SR.7~0) will assure if the
device goes back to normal reset and enters array read
mode.
2.5 Read Configuration Codes
The read configuration codes operation outputs the manu-
facturer code, device code, sector lock configuration
codes, and the protection register. Using the manufac-
turer and device codes, the system CPU can automati-
cally match the device with its proper algorithms. The
sector lock codes identify locked and unlocked sectors.
2.6 Write
Writing commands to the CUI enable reading of device
data and identifier codes. They also control inspection
and clearing of the status register. When VCCf=2.7V-
3.6V and VPP within VPP1 or VPP2 range, the CUI ad-
ditionally controls sector erase, word write and sector
lock/unlock.
The Sector Erase command requires appropriate com-
mand data and an address within the sector to be erased.
The Full Chip Erase command requires appropriate com-
mand data and an address within the device. The Word
Write command requires the command and address of
the location to be written. Set Sector lock/unlock com-
mands require the command and address within the de-
vice or sector within the device (Sector Lock) to be locked.
The Clear Sector Lock-Bits command requires the com-
mand and address within the device.
The CUI does not occupy an addressable memory loca-
tion. It is written when WEf# and CEf# are active (which-
ever goes high first). The address and data needed to
execute a command are latched on the rising edge of
WEf# or CEf#. Standard microprocessor write timings are
used.


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