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HT82K94E Datasheet(PDF) 9 Page - Holtek Semiconductor Inc |
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HT82K94E Datasheet(HTML) 9 Page - Holtek Semiconductor Inc |
9 / 44 page HT82K94E/HT82K94A Rev. 1.00 9 November 22, 2005 Data Memory - RAM for Bank 1 The special function registers used in USB interface are located in RAM bank 1. In order to access the Bank1 register, only the Indirect addressing pointer MP1 can be used and the Bank register BP should be set to ²1². The mapping of RAM bank 1 is as shown. Indirect Addressing Register Location 00H and 02H are indirect addressing registers that are not physically implemented. Any read/write op- eration of [00H] ([02H]) will access data memory pointed to by MP0 (MP1). Reading location 00H (02H) itself indi- rectly will return the result 00H. Writing indirectly results in no operation. The indirect addressing pointer (MP0) always point to Bank0 RAM addresses regardless of the value of the Bank Register (BP). The indirect addressing pointer (MP1) can access Bank0 or Bank1 RAM data according to the value of BP which is set to ²0² or ²1² respectively. The memory pointer registers (MP0 and MP1) are 8-bit registers. Accumulator The accumulator is closely related to ALU operations. It is also mapped to location 05H of the data memory and can carry out immediate data operations. The data movement between two data memory locations must pass through the accumulator. Arithmetic and Logic Unit - ALU This circuit performs 8-bit arithmetic and logic opera- tions. The ALU provides the following functions: · Arithmetic operations (ADD, ADC, SUB, SBC, DAA) · Logic operations (AND, OR, XOR, CPL) · Rotation (RL, RR, RLC, RRC) · Increment and Decrement (INC, DEC) · Branch decision (SZ, SNZ, SIZ, SDZ) The ALU not only saves the results of a data operation but also changes the status register. Status Register - STATUS This 8-bit register (0AH) contains the zero flag (Z), carry flag (C), auxiliary carry flag (AC), overflow flag (OV), power down flag (PDF), and watchdog time-out flag (TO). It also records the status information and controls the operation sequence. With the exception of the TO and PDF flags, bits in the status register can be altered by instructions like most other registers. Any data written into the status register will not change the TO or PDF flag. In addi- tion operations related to the status register may give different results from those intended. The TO flag can be affected only by system power-up, a WDT time-out or executing the ²CLR WDT² or ²HALT² instruction. The PDF flag can be affected only by ex- ecuting the ²HALT² or ²CLR WDT² instruction or dur- ing a system power-up. The Z, OV, AC and C flags generally reflect the status of the latest operations. Bit No. Label Function 0C C is set if an operation results in a carry during an addition operation or if a borrow does not take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate through carry instruction. 1AC AC is set if an operation results in a carry out of the low nibbles in addition or no borrow from the high nibble into the low nibble in subtraction; otherwise AC is cleared. 2 Z Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared. 3OV OV is set if the operation results in a carry into the highest-order bit but not a carry out of the highest-order bit, or vice versa; otherwise OV is cleared. 4 PDF PDF is cleared by system power-up or executing the ²CLR WDT² instruction. PDF is set by executing the ²HALT² instruction. 5TO TO is cleared by system power-up or executing the ²CLR WDT² or ²HALT² instruction. TO is set by a WDT time-out. 6~7 ¾ Unused bit, read as ²0² Status (0AH) Register U n d e f i n e d , r e s e r v e d f o r f u t u r e e x p a n s i o n P I P E _ C T R L A W R S T A L L P I P E S I E S M I S C E n d p t _ E N F I F O 0 F I F O 1 F I F O 2 F I F O 3 4 0 H 4 1 H 4 2 H 4 3 H 4 4 H 4 5 H 4 6 H 4 7 H 4 8 H 4 9 H 4 A H 4 B H 4 C H F F H Bank 1 RAM Mapping |
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