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MX29LV033MBMC-90Q Datasheet(PDF) 10 Page - Macronix International |
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MX29LV033MBMC-90Q Datasheet(HTML) 10 Page - Macronix International |
10 / 66 page 10 P/N:PM1136 REV. 1.1, AUG. 11, 2005 MX29LV320M H/L REQUIREMENTS FOR READING ARRAY DATA To read array data from the outputs, the system must drive the CE# and OE# pins to VIL. CE# is the power control and selects the device. OE# is the output control and gates array data to the output pins. WE# should re- main at VIH. The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This ensures that no spurious alteration of the memory con- tent occurs during the power transition. No command is necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid address on the device address inputs produce valid data on the de- vice data outputs. The device remains enabled for read access until the command register contents are altered. PAGE MODE READ The MX29LV320M H/L offers "fast page mode read" func- tion. This mode provides faster read access speed for random locations within a page. The page size of the device is 4 words/8 bytes. The appropriate page is se- lected by the higher address bits A0~A1(Word Mode)/A- 1~A1(Byte Mode) This is an asynchronous operation; the microprocessor supplies the specific word location. The system performance could be enhanced by initiating 1 normal read and 3 fast page read (for word mode A0- A1) or 7 fast page read (for byte mode A-1~A1). When CE# is deasserted and reasserted for a subsequent ac- cess, the access time is tACC or tCE. Fast page mode accesses are obtained by keeping the "read-page ad- dresses" constant and changing the "intra-read page" addresses. WRITING COMMANDS/COMMAND SE- QUENCES To program data to the device or erase sectors of memory, the system must drive WE# and CE# to VIL, and OE# to VIH. An erase operation can erase one sector, multiple sec- tors, or the entire device. Table indicates the address space that each sector occupies. A "sector address" consists of the address bits required to uniquely select a sector.The "Writing specific address and data commands or sequences into the command register initiates device operations. Table 1 defines the valid register command sequences. Writing incorrect address and data values or writing them in the improper sequence resets the device to reading array data. Section has details on erasing a sector or the entire chip, or suspending/resuming the erase operation. After the system writes the Automatic Select command sequence, the device enters the Automatic Select mode. The system can then read Automatic Select codes from the internal register (which is separate from the memory array) on Q7-Q0. Standard read cycle timings apply in this mode. Refer to the Automatic Select Mode and Au- tomatic Select Command Sequence section for more information. ICC2 in the DC Characteristics table represents the ac- tive current specification for the write mode. The "AC Characteristics" section contains timing specification table and timing diagrams for write operations. WRITE BUFFER Write Buffer Programming allows the system to write a maximum of 16 words/32 bytes in one programming op- eration.This results in faster effective programming time than the standard programming algorithms. See "Write Buffer" for more information. ACCELERATED PROGRAM OPERATION The device offers accelerated program operations through the ACC function. This is one of two functions provided by the ACC pin. This function is primarily intended to allow faster manufacturing throughput at the factory. If the system asserts VHH on this pin, the device auto- matically enters the aforementioned Unlock Bypass mode, temporarily unprotects any protected sectors, and uses the higher voltage on the pin to reduce the time required for program operations. The system would use a two-cycle program command sequence as required by the Unlock Bypass mode. Removing VHH from the ACC pin must not be at VHH for operations other than accel- erated programming, or device damage may result. |
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