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MX29LV002NCBQC-90 Datasheet(PDF) 1 Page - Macronix International |
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MX29LV002NCBQC-90 Datasheet(HTML) 1 Page - Macronix International |
1 / 58 page 1 P/N:PM1204 REV. 1.0, JUN. 30, 2005 2M-BIT [256K x 8] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY • Ready/Busy# pin (RY/BY#) - Provides a hardware method of detecting program or erase operation completion. • Sector protection - Hardware method to disable any combination of sectors from program or erase operations - Temporary sector unprotect allows code changes in previously locked sectors • CFI (Common Flash Interface) compliant - Flash device parameters stored on the device and provide the host system to access • 100,000 minimum erase/program cycles • Latch-up protected to 100mA from -1V to VCC+1V • Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector • Hardware RESET# pin (only for 29LV002C) - Resets internal state machine to read mode • Package type: - 32-pin TSOP (type 1) - 32-pin PLCC • 20 years data retention FEATURES • Extended single - supply voltage range 2.7V to 3.6V • 262,411 x 8 • Single power supply operation - 3.0V only operation for read, erase and program operation • Fast access time: 70/90ns • Low power consumption - 20mA maximum active current - 0.2uA typical standby current • Command register architecture - Byte Programming (9us typical) - Sector Erase (Sector structure 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x1, and 64K-Byte x3) • Auto Erase (chip & sector) and Auto Program - Automatically erase any combination of sectors with Erase Suspend capability. - Automatically program and verify data at specified address • Erase suspend/Erase Resume - Suspends sector erase operation to read data from, or program data to, any sector that is not being erased, then resumes the erase. • Status Reply - Data# Polling & Toggle bit for detection of program and erase operation completion. GENERAL DESCRIPTION The MX29LV002C T/B is a 2-mega bit Flash memory organized as 256K bytes of 8 bits. MXIC's Flash memo- ries offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV002C T/B is packaged in 32-pin TSOP and 32-pin PLCC. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29LV002C T/B offers access time as fast as 70ns, allowing operation of high-speed micropro- cessors without wait states. To eliminate bus conten- tion, the MX29LV002C T/B has separate chip enable (CE#) and output enable (OE#) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29LV002C T/B uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maxi- mum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cy- cling. The MX29LV002C T/B uses a 2.7V~3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up pro- tection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V. MX29LV002C/002NC T/B |
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