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MX25L6402AMI-40 Datasheet(PDF) 2 Page - Macronix International |
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MX25L6402AMI-40 Datasheet(HTML) 2 Page - Macronix International |
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2 / 30 page  2 P/N: PM1040 REV. 1.0, SEP. 29, 2004 MX25L6402A PIN CONFIGURATIONS SYMBOL DESCRIPTION CS# Chip Select SI Serial Data Input SO/PO7 Serial Data Output/Paralled Data Output SCLK Clock Input ACC 12V for program/erase acceleration VCC + 3.3V Power Supply GND Ground DU(1) Do Not Use(for Test Mode only) NC No Internal Connection PO0~PO6 Parallel data output (PO0~PO6 can be connected to NC in serial mode) RESET# Reset PIN DESCRIPTION 28-PIN SOP (330 mil) Note: 1.DU pin is used for in-house testing and can be tied to VCC, GND or open for normal operation. There is a weak pull-up resister from VCC to DU pin. GENERAL DESCRIPTION The MX25L6402A is a CMOS 67,108,864 bit serial eLite FlashTM Memory, which is configured as 8,388,608 x 8 internally. The MX25L6402A features a serial peripheral interface and software protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS# input. The MX25L6402A provide sequential read operation on whole chip. User may start to read from any byte of the array. While the end of the array is reached, the device will wrap around to the beginning of the array and continuously outputs data until CS# goes high. After program/erase command is issued, auto program/ erase algorithms which program/erase and verify the specified page locations will be executed. Program command is executed on a page (128 bytes) basis, and erase command is executed on both chip and sector (64K bytes) basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion and error flag status of a program or erase operation. To increase user's factory throughputs, a parallel mode is provided. The performance of read/program is dramatically improved than serial mode. When the device is not in operation and CS# is high, it is put in standby mode and draws less than 5uA DC current. The MX25L6402A utilizes MXIC's proprietary memory cell which reliably stores memory contents even after 100 program and erase cycles. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NC DU RESET# NC NC NC NC NC NC NC NC NC NC NC 28 27 26 25 24 23 22 21 20 19 18 17 16 15 PO6 GND VCC PO5 PO4 PO3 SI SO/PO7 CS# SCLK ACC PO2 PO1 PO0 |
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