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SI2107-X-FM Datasheet(PDF) 1 Page - Silicon Laboratories |
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SI2107-X-FM Datasheet(HTML) 1 Page - Silicon Laboratories |
1 / 80 page Preliminary Rev. 0.7 3/06 Copyright © 2006 by Silicon Laboratories Si2107/08/09/10 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Si2107/08/09/10 SATELLITE RECEIVER FOR DVB-S/DSS Features Applications Description The Si2107/08/09/10 are a family of pin-compatible, complete front-end solutions for DSS and DVB-S digital satellite reception. The IC family incorporates a tuner, demodulator, and LNB controller into a single device resulting in significantly reduced board space and external component count. The device supports symbol rates of 1 to 45 MBaud over a 950 to 2150 MHz range. A full suite of features including automatic acquisition, fade recovery, blind scanning, performance monitoring, and DiSEqC Level 2.2 compliant signaling are supported. The Si2108/ 10 further add short circuit protection, overcurrent protection, and a step-up dc-dc controller to implement a low-cost LNB supply solution. Si2110/09 versions include a hardware channel scan accelerator for fast “blindscan”. An I2C bus interface is used to configure and monitor all internal parameters. Functional Block Diagram Single-chip tuner, demodulator, and LNB controller DVB-S- and DSS-compliant QPSK/BPSK demodulation Integrated step-up dc-dc converter for LNB power supply (Si2108/10 only) Input signal level: –81 to –18 dBm Symbol rate range: 1 to 45 MBaud Automatic acquisition and fade recovery Automatic gain control On-chip blind scan accelerator (Si2109/10 only) DiSEqC™ 2.2 support Power, C/N, and BER estimators I2C bus interface 3.3/1.8 V supply, 3.3 V I/O Lead-free/RoHS-compliant package Set-top boxes Digital video recorders Digital televisions Satellite PC-TV SMATV trans-modulators (Satellite Master Antenna TV) Acquisition Control AGC Tuner Demodulator Viterbi Decoder RS Decoder LNB Control RF Sythesizer I2C Interface XOUT SCL SDA INT/RLK/GPO TS_ERR TS_SYNC TS_VAL TS_DATA[7:0] TS_CLK PWM/DCS ISEN/NC LNB2/DRL VSEN/TDET RFIP LNB1/TGEN Pin Assignments Si2107/08/09/10 14 15 16 17 18 19 20 21 22 36 37 38 39 40 41 42 43 44 VDD_LNA REXT ADDR VDD_MIX VDD_BB VDD_ADC VSEN/TDET LNB1/TGEN ISEN PWM/DCS VDD_DIG18 TS_DATA[7] SCL SDA TS_SYNC TS_VAL TS_ERR INT/RLK/GPO VDD_PLL33 XTOUT VDD_XTAL XTAL2 XTAL1 RESET LNB2/DRC TS_DATA[6] Top View 1 2 3 4 5 6 7 8 9 10 11 12 13 23 24 25 26 27 28 29 30 31 32 33 34 35 GND GND |
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