MC33389CDW datasheet(7/35 Pages) MOTOROLA

Part #	MC33389CDW

Description	System Basis Chip with Low Speed Fault Tolerant CAN

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Manufacturer	MOTOROLA [Motorola, Inc]

Direct Link	http://www.freescale.com

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MC33389

MOTOROLA

7

MC33389

TX Permanent Dominant

Timer Disable Time

Ttxd

0.75

4

ms

BusNormal Mode and

Failure Mode

TX, MOSI, SCK, CSB

High Level Input Voltage

0.7V1

V1+0.3V

CSB Threshold for SPI Wake-up

2.2

V

SBC in Sleep Mode,

V1<1.5V

CSB Filter Time for SPI Wake-up

3

µs

SBC in Sleep Mode, V1<1V

Low Level Input Voltage

-0.3

0.3 V1

V

High Level Input Current on CSB

-100

-20

µA

Vi=4V

Low Level Input Current (CSB)

-100

-20

µA

Vi=1V

TX High Level Input Current

ITX

-200

-80

-25

µA

Vi=4V

TX Low Level Input Current

ITX

-800

-320

-100

µA

Vi=1V

SI, SCK Input Current

-10

10

µA0<VIN<V1

RX, INTB, MISO

High Level Output Voltage

Voh

V1-0.9

V1

V

I0=-250µA

Low Level Output Voltage

Vol

0

0.9

V

I0=1.5mA

Tristated SO Output Current

Iz

-2

+2

µA0V<Vso<V1

RSTB Pin

High Level Input Voltage

Vih

0.7V1

V1+0.3V

Low Level Input Voltage

Vil

-0.3

0.3V1

V

High Level Output current 1

-50

-30

-10

µA0<Vout<0.5V1

High Level Output current 2

-300

µA0.5<Vout<V1

Low Level Output Voltage (I0=1.5mA)

0

0.9

V

1v<Vbat<27V

Reset Duration after V1High

tres

1ms

L0, L1, L2 WAKE-UP INPUTS

Positive Switching Threshold

Vwup

3

3.7

4.5

V

6V<Vbat<16V

Negative Switching Threshold

Vwun

2.5

3

3.8

V

6V<Vbat<16V

Hysteresis

Vhyst

700

mV

6V<Vbat<16V

Leakage Current 0<Vwu<Vbat

-5

+5

µA

Wake up Filter Time

8

20

38

µs

Lx input current @ 40V

Vin

350

600

µA

DIGITAL INTERFACE TIMING

SCLK Clock Period

tpSCLK

500

ns

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions

Freescale Semiconductor, Inc.

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MC33389CDW Datasheet(PDF) 7 Page - Motorola, Inc

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