MX23L6454 datasheet(6/18 Pages) MCNIX

Part #	MX23L6454

Description	64M-BIT Low Voltage, Serial Mask ROM Memory with 50MHz SPI Bus Interface

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Manufacturer	MCNIX [Macronix International]

Direct Link	http://www.macronix.com

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6

P/N: PM1127

REV. 1.1, MAR. 09, 2005

MX23L6454

INSTRUCTIONS

All instructions, addresses and data are shifted in and out

of the device, most significant bit first.

Serial Data Input (D) is sampled on the first rising edge of

Serial Clock (C) after Chip Select (S#) is driven Low. Then,

the one-byte instruction code must be shifted in to the

device, most significant bit first, on Serial Data Input (D),

each bit being latched on the rising edges of Serial Clock

(C).

The instruction set is listed in Table 1.

Table 1. Instruction Set

Every instruction sequence starts with a one-byte instruc-

tion code. Depending on the instruction, this might be

followed by address bytes, or by data bytes, or by both or

none.

In the case of a Read Data Bytes (READ), Read Data

Bytes at Higher Speed (Fast_Read), the shifted-in instruc-

tion sequence is followed by a data-out sequence. Chip

Select (S#) can be driven High after any bit of the data-out

sequence is being shifted out.

Instruction

Description

One-byte Instruction Code

Address

Bytes

Dummy

Bytes

Data

Bytes

READ

Read Data Bytes

0000 0011

03h

3

0

1 to

∞

FAST_READ

Read Data Bytes at Higher Speed

0000 1011

0Bh

3

1

1 to

∞

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