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MX23J12840TC-50G Datasheet(PDF) 1 Page - Macronix International |
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MX23J12840TC-50G Datasheet(HTML) 1 Page - Macronix International |
1 / 20 page 1 P/N:PM1097 REV. 1.2, OCT. 28, 2005 FEATURES • Word organization - (16,777,216 + 1,048,576Note) by 8 bits • Page size - (512 + 16Note) by 8 bits • Block size - (16,384 + 512Note) by 8 bits Note : Underlined parts are redundancy and fixed to all FFH. • Operation mode - READ mode (1), READ mode (2), READ mode (3), RESET • Operating supply voltage : VCC = 2.7~3.6V MX23J12840 128M-BIT NAND INTERFACE XtraROMTM • Access Time - Memory cell array to starting address : 7 us (MAX.) - Read cycle time : 50 ns (MAX.) - RE access time : 35 ns (MAX.) • Operating supply current - During read : 30 mA (MAX.) (50 ns cycle operation) - During standby (CMOS) : 40 uA (MAX.) • Package Type - 48-pin TSOP(I) (12mmx20mm) • XtraROMTM : factory pre-programmed ROM with Macronix NBitTM technology, supporting short TAT • Process - 0.15um PIN DESCRIPTION SYMBOL PIN NAME I/O0~I/O7 Address Input/Command Inputs/ Data Outputs CLE Command Latch Enable ALE Address Latch Enable WE Write Enable RE Read Enable CE Chip Enable RB READY, /BUSY pin VCC Supply Voltage NC No Connection GND Ground PIN CONFIGURATIONS 48 TSOP NC NC NC NC NC GND RB RE CE NC NC VCC VSS NC NC CLE ALE WE NC NC NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 NC NC NC NC I/O7 I/O6 I/O5 I/O4 NC NC NC VCC GND NC NC NC I/O3 I/O2 I/O1 I/O0 NC NC NC NC 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 MX23J12840 (Normal Type) ORDER INFORMATION Part No. Package Grade MX23J12840TC-50G 48 pin TSOP (Pb-free, RoHS) Commercial MX23J12840TC-50 48 pin TSOP Commercial MX23J12840TI-50G 48 pin TSOP (Pb-free, RoHS) Industrial |
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