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T-8110L Datasheet(PDF) 5 Page - Agere Systems |
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T-8110L Datasheet(HTML) 5 Page - Agere Systems |
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5 / 164 page  Table of Contents (continued) Contents Page Agere Systems Inc. 5 February 2004 Ambassador T8110L H.100/H.110 Switch Data Sheet 11.1.2 GP Testpoint Enable Register ..................................................................................................108 11.1.3 State Counter Modes Registers ................................................................................................110 11.1.4 Miscellaneous Diagnostics Low Register..................................................................................110 11.1.5 Miscellaneous Diagnostic Registers .........................................................................................111 11.2 Diagnostic Circuit Operation .................................................................................................................112 12 Connection Control .........................................................................................................................................113 12.1 Programming Interface .........................................................................................................................113 12.1.1 Connection Memory Programming ...........................................................................................113 12.2 Switching Operation..............................................................................................................................115 12.2.1 Memory Architecture and Configuration....................................................................................115 12.2.1.1 Connection Memory ..................................................................................................115 12.2.1.2 Data Memory .............................................................................................................116 12.2.2 Standard Switching ...................................................................................................................117 12.2.2.1 Constant Delay and Minimum Delay Connections ....................................................117 12.2.2.2 Pattern Mode .............................................................................................................117 12.2.2.3 Subrate ......................................................................................................................117 13 Electrical Characteristics.................................................................................................................................124 13.1 Absolute Maximum Ratings ..................................................................................................................124 13.1.1 Handling Precautions ................................................................................................................124 13.2 Crystal Specifications ...........................................................................................................................124 13.2.1 XTAL1 Crystal ...........................................................................................................................124 13.2.2 XTAL2 Crystal ...........................................................................................................................125 13.2.3 Reset Pulse...............................................................................................................................126 13.3 Thermal Parameters (Definitions and Values)......................................................................................126 13.4 Reliability ..............................................................................................................................................127 13.5 dc Electrical Characteristics..................................................................................................................128 13.5.1 Electrical Drive Specifications, CT_C8 and /CT_FRAME .........................................................128 13.5.2 All Other Pins ............................................................................................................................129 13.6 H-Bus Timing ........................................................................................................................................129 13.6.1 Timing Diagrams .......................................................................................................................129 13.7 ac Electrical Characteristics..................................................................................................................130 13.7.1 Skew Timing, H-Bus..................................................................................................................130 13.8 Hot Swap ..............................................................................................................................................131 13.8.1 LPUE (Local Pull-Up Enable)....................................................................................................131 13.9 Decoupling............................................................................................................................................131 13.10 APLL VDD Filter ....................................................................................................................................132 13.11 PC Board PBGA Considerations ..........................................................................................................133 13.12 Unused Pins .........................................................................................................................................133 13.13 External Pull-Up Pins............................................................................................................................133 13.14 T8110L Evaluation Kits.........................................................................................................................133 13.15 T8110L Ordering Information................................................................................................................133 14 JTAG/Boundary Scan .....................................................................................................................................137 14.1 The Principle of Boundary-Scan Architecture.......................................................................................137 14.1.1 Instruction Register ...................................................................................................................138 14.2 Boundary-Scan Register.......................................................................................................................138 A Constant and Minimum Delay Connections ....................................................................................................139 A.1 Connection Definitions..........................................................................................................................139 A.2 Delay Type Definitions..........................................................................................................................139 B Register Bit Field Mnemonic Summary...........................................................................................................142 Significant Changes Between the June 2003 and November 2003 Release ........................................................163 |
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