C8051F340/1/2/3/4/5/6/7
10
Rev. 0.5
8. Voltage Regulator (REG0)
Table 8.1. Voltage Regulator Electrical Specifications............................................ 69
Figure 8.1. REG0 Configuration: USB Bus-Powered ............................................... 70
Figure 8.2. REG0 Configuration: USB Self-Powered ............................................... 70
Figure 8.3. REG0 Configuration: USB Self-Powered, Regulator Disabled .............. 71
Figure 8.4. REG0 Configuration: No USB Connection............................................. 71
9. CIP-51 Microcontroller
Figure 9.1. CIP-51 Block Diagram............................................................................ 73
Table 9.1. CIP-51 Instruction Set Summary............................................................ 75
Figure 9.2. Memory Map .......................................................................................... 79
Table 9.2. Special Function Register (SFR) Memory Map...................................... 81
Table 9.3. Special Function Registers .................................................................... 82
Table 9.4. Interrupt Summary ................................................................................. 89
10. Prefetch Engine
11. Reset Sources
Figure 11.1. Reset Sources.................................................................................... 101
Figure 11.2. Power-On and VDD Monitor Reset Timing ........................................ 102
Table 11.1. Reset Electrical Characteristics........................................................... 107
12. Flash Memory
Table 12.1. Flash Electrical Characteristics ........................................................... 111
Figure 12.1. Flash Program Memory Map and Security Byte................................. 112
13. External Data Memory Interface and On-Chip XRAM
Figure 13.1. USB FIFO Space and XRAM Memory Map with USBFAE set to ‘1’ .. 118
Figure 13.2. Multiplexed Configuration Example.................................................... 122
Figure 13.3. Non-multiplexed Configuration Example ............................................ 123
Figure 13.4. EMIF Operating Modes ...................................................................... 123
Figure 13.5. Non-multiplexed 16-bit MOVX Timing ................................................ 127
Figure 13.6. Non-multiplexed 8-bit MOVX without Bank Select Timing ................. 128
Figure 13.7. Non-multiplexed 8-bit MOVX with Bank Select Timing ...................... 129
Figure 13.8. Multiplexed 16-bit MOVX Timing........................................................ 130
Figure 13.9. Multiplexed 8-bit MOVX without Bank Select Timing ......................... 131
Figure 13.10. Multiplexed 8-bit MOVX with Bank Select Timing ............................ 132
Table 13.1. AC Parameters for External Memory Interface.................................... 133
14. Oscillators
Figure 14.1. Oscillator Diagram.............................................................................. 135
Table 14.1. Oscillator Electrical Characteristics ..................................................... 145
15. Port Input/Output
Figure 15.1. Port I/O Functional Block Diagram (Port 0 through Port 3) ................ 147
Figure 15.2. Port I/O Cell Block Diagram ............................................................... 148
Figure 15.3. Crossbar Priority Decoder with No Pins Skipped ............................... 149
Figure 15.4. Crossbar Priority Decoder with Crystal Pins Skipped ........................ 150
Table 15.1. Port I/O DC Electrical Characteristics.................................................. 162
16. Universal Serial Bus Controller (USB0)
Figure 16.1. USB0 Block Diagram.......................................................................... 163
Table 16.1. Endpoint Addressing Scheme ............................................................. 164
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