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HV9608 Datasheet(PDF) 5 Page - Supertex, Inc

Part # HV9608
Description  Active Clamp Current-Mode PWM Controller
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Manufacturer  SUTEX [Supertex, Inc]
Direct Link  http://www.supertex.com
Logo SUTEX - Supertex, Inc

HV9608 Datasheet(HTML) 5 Page - Supertex, Inc

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HV9608
5
A122104
Functional Block Diagram
High Voltage
startup regulator
VIN
REF
UVLO
Bandgap
reference
+
-
1.135V
RT
Oscillator
SQ
R
VS
+
-
1.135V
pwm
Comp
+
eAmp
1.135V
0.6V
+
-
GATE
VDD
driver
FB
Delay
Logic
AGATE
DT1
DT2
100ns blanking
CS
+
-
3.85V
Ι
Ι
UVLO
SS
GND
+
-
0.6V
+
-
ramp
SC
R
POR
+
-
1.135V
5.45V
Functional Description
HIGH VOLTAGE REGULATOR
When DC voltage from 12 to 250V is applied to the VIN pin, an
internal high voltage linear regulator provides a regulated output
voltage of 9.3V at the VDD pin. This voltage can be used to start the
DC/DC converter. Applying external voltage to the VDD pin that is
higher than its output voltage will disable the regulator. Therefore,
the VIN pin will draw negligible current once the DC/DC converter
has started, and a “bootstrap” voltage has developed at the VDD
pin. Alternatively, the high voltage regulator can continuously
supply bias current up to 20mA powering the gate driver and all
internal circuits of HV9608. The need for a bootstrap power supply
would be eliminated in this case. However, caution must be taken
to maintain the HV9608 within its package power dissipation limits.
The output of the linear regulator is equipped with an under voltage
protection comparator that disables all internal circuits when the
voltage at the VDD pin falls below 7.62V. Hysteresis of 0.76V is
provided.
INPUT UNDER VOLTAGE LOCKOUT (UVLO)
The HV9608 provides a programmable under voltage protection
input (UVLO pin) that allows independent setting of the turn-on and
the turn-off limits for the input voltage of the DC/DC converter.
When the voltage applied to the UVLO pin exceeds 1.135V, the
gate driver and the reference voltage at the VREF pin are enabled,
and the DC/DC converter starts switching. At the same time, a
current of 14µA is sourced from the UVLO pin. This current sets
the hysteresis that can be calculated in accordance with the
following equation:
12
12
14
UVLO
R R
VA
R
R
µ
∆=
+
,
where R1 and R2 are the input voltage divider resistors.
OSCILLATOR FREQUENCY
The switching frequency of the HV9608 can be programmed using
a single resistor connected to the RT pin:
[]
[]
9
1
300 10
OSC
T
T
FHz
R
CF
⎛⎞
−⋅
⎜⎟
⎜⎟
⎝⎠
=
SOFT START
As soon as the voltage at the VDD pin exceeds the turn-on
threshold, a 7µA current is sourced from the SS pin into an
external soft-start capacitor CSS. As the voltage across CSS ramps
up linearly, the output of the error amplifier (COMP) gradually
increases until regulation of the output voltage is achieved. Sizing
CSS programs the time duration of the soft start mode. When CSS is
sized properly, no overshoot of the output voltage or excessive
input inrush current will occur. When the voltage at the VDD pin falls
below the under voltage protection threshold, CSS is rapidly
discharged to zero.


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