5

NR032106

HV2301

Truth Table

D0

D1

D2

D3

D4

D5

D6

D7

LE

CLR

SW0

SW1

SW2

SW3

SW4

SW5

SW6

SW7

L

L

L

Off

HL

L

On

L

L

L

Off

HL

L

On

L

L

L

Off

HL

L

On

L

L

L

Off

HL

L

On

L

L

L

Off

HL

L

On

L

L

L

Off

HL

L

On

L

L

L

Off

HL

L

On

L

L

L

Off

HL

L

On

X

X

X

X

X

X

X

X

H

L

Hold Previous State

X

X

X

X

X

X

X

X

X

H

All Switches Off

Notes:

1. The eight switches operate independently.

2. Serial data is clocked in on the L to H transition of the CLK.

3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flow through the latch.

4. D

5. Shift register clocking has no effect on the switch states if LE is high.

6. The CLR clear input overrides all other inputs.