6

PS8667A

10/04/04

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PI90LV3486/PI90LVT3486

PI90LV9637/PI90LVT9637

LVDS High-Speed Differential Line Receivers

Figure 4. Receiver Three-State Delay Waveforms

Output When

Output When

EN* When EN = GND

3V

0V

0.5V

0.5V

50%

50%

1.5V

1.5V

1.5V

1.5V

GND

0V

3V

Figure5.Point-to-PointApplication

ANY LVDS DRIVER

Enable

Data

Input

1/4 PI90LV3486

Data

Output

RT

+

–

100

Ω

Balanced System