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LTC4010 Datasheet(PDF) 6 Page - Linear Integrated Systems |
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LTC4010 Datasheet(HTML) 6 Page - Linear Integrated Systems |
6 / 20 page 6 LTC4010 4010p PI FU CTIO S FAULT (Pin 1): Active-Low Fault Indicator Output. The LTC4010 indicates various battery and internal fault con- ditions by connecting this pin to GND. Refer to the Opera- tion and Applications Information sections for further details. This output is capable of driving an LED and should be left floating if not used. FAULT is an open-drain output to GND with an operating voltage range of GND to VCC. CHRG (Pin 2): Active-Low Charge Indicator Output. The LTC4010 indicates it is providing charge to the battery by connecting this pin to GND. Refer to the Operation and Applications Information sections for further details. This output is capable of driving an LED and should be left floating if not used. CHRG is an open-drain output to GND with an operating voltage range of GND to VCC. CHEM (Pin 3): Battery Chemistry Selection Input. This pin should be wired to GND to select NiMH fast charge termination parameters. If a voltage greater than 2.85V is applied to this pin, or it is left floating, NiCd parameters are used. Refer to the Applications Information section for further details. Operating voltage range is GND to 3.3V. GND (Pin 4): Ground. This pin provides a single-point ground for internal references and other critical analog circuits. VTEMP (Pin 5): Battery Temperature Input. An external 10k NTC thermistor may be connected between VTEMP and GND to provide temperature-based charge qualifica- tion and additional fast charge termination control. Charg- ing may also be paused by connecting the VTEMP pin to GND. Refer to the Operation and Applications Informa- tion sections for complete details on external thermistor networks and charge control. If this pin is not used it should be wired to INTVDD through 56k. Operating volt- age range is GND to 3.3V. VCELL (Pin 6): Average Single-Cell Voltage Input. An external voltage divider between BAT and VCDIV is attached to this pin to monitor the average single-cell voltage of the battery pack. The LTC4010 uses this information to pro- tect against catastrophic battery overvoltage and to con- trol the charging state. Refer to the Applications Information section for further details on the external divider network. Operating voltage range is GND to BAT. VCDIV (Pin 7): Average Cell Voltage Resistor Divider Ter- mination. The LTC4010 connects this pin to GND provided the charger is not in shutdown. VCDIV is an open-drain output to GND with an operating voltage range of GND to BAT. TIMER (Pin 8): Charge Timer Input. A resistor connected between TIMER and GND programs charge cycle timing limits. Refer to the Applications Information section for complete details. Operating voltage range is GND to 1V. SENSE (Pin 9): Charge Current Sense Input. An external resistor between this input and BAT is used to program charge current. Refer to the Applications Information section for complete details on programming charge current. Operating voltage ranges from (BAT – 50mV) to (BAT + 200mV). BAT (Pin 10): Battery Pack Connection. The LTC4010 uses the voltage on this pin to control current sourced from VCC to the battery during charging. Allowable operating volt- age range is GND to VCC. INTVDD (Pin 11): Internal 5V Regulator Output. This pin provides a means of bypassing the internal 5V regulator used to power the BGATE output driver. Typically, power should not be drawn from this pin by the application circuit. Refer to the Application Information section for additional details. BGATE (Pin 12): External Synchronous N-channel MOSFET Gate Control Output. This output provides gate drive to an optional external NMOS power transistor switch used for synchronous rectification to increase efficiency in the step-down DC/DC converter. Operating voltage is GND to INTVDD. BGATE should be left floating if not used. PGND (Pin 13): Power Ground. This pin provides a return for switching currents generated by internal LTC4010 circuits. Externally, PGND and GND should be wired together using a very low impedance connection. Refer to PCB Layout Considerations in the Applications Informa- tion section for additional grounding details. |
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Similar Description - LTC4010 |
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