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K9WAG08U1A-P Datasheet(PDF) 10 Page - Samsung semiconductor |
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K9WAG08U1A-P Datasheet(HTML) 10 Page - Samsung semiconductor |
10 / 49 page FLASH MEMORY 10 K9WAG08U1A K9K8G08U0A Preliminary K9K8G08U0A is arranged in four 2Gb memory planes. Each plane contains 2,048 blocks and 2112 byte page registers. This allows it to perform simultaneous page program and block erase by selecting one page or block from each plane. The block address map is configured so that two-plane program/erase operations can be executed by dividing the memory array into plane 0~1 or plane 2~3 separately. For example, two-plane program/erase operation into plane 0 and plane 2 is prohibited. That is to say, two-plane program/erase oper- ation into plane 0 and plane 1 or into plane 2 and plane 3 is allowed Plane 0 Plane 1 Plane 2 Plane 3 (2048 Block) (2048 Block) (2048 Block) (2048 Block) Page 0 Page 1 Page 63 Page 62 Memory Map Block 0 Page 0 Page 1 Page 63 Page 62 Block 1 Page 0 Page 1 Page 63 Page 62 Block 4096 Page 0 Page 1 Page 63 Page 62 Block 4097 Page 0 Page 1 Page 63 Page 62 Block 4094 Page 0 Page 1 Page 63 Page 62 Block 4095 Page 0 Page 1 Page 63 Page 62 Block 8190 Page 0 Page 1 Page 63 Page 62 Block 8191 2112byte Page Registers 2112byte Page Registers 2112byte Page Registers 2112byte Page Registers Page 0 Page 1 Page 63 Page 62 Block 2 Page 0 Page 1 Page 63 Page 62 Block 3 Page 0 Page 1 Page 63 Page 62 Block 4098 Page 0 Page 1 Page 63 Page 62 Block 4099 Page 0 Page 1 Page 63 Page 62 Block 4092 Page 0 Page 1 Page 63 Page 62 Block 4093 Page 0 Page 1 Page 63 Page 62 Block 8188 Page 0 Page 1 Page 63 Page 62 Block 8189 |
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