VRS51C1100
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www.ramtron.com
page 7 of 50
An alternate way to force the VRS51C1100 to jump to
the ISP boot program is to maintain pins P2.6 and P2.7
or pin P4.3 at a low logic level during a hardware reset,
as shown in the diagram below:
FIGURE 4: VRS51C1100 ALTERNATE ISP BOOT PROGRAM ACCESS
10ms
10ms
P2.7
P2.6
RES
OR...
P4.3
RES
10ms
10ms
The ISP boot program can also be accessed via the
LJMP instruction.
When the ISP page configuration is set to 0 while the
device
is
being
programmed
with
a
parallel
programmer, the ISP boot feature will be disabled.
VRS51C1100 ISPVx Firmware Boot Program
An ISP boot loader program is available for the
VRS51C1100. (ISPVx Firmware, x = revision, see
Ramtron website for latest revision) that resides in
locations F200h to FFFFh in the upper 3.5KB of the
VRS51C1100 Program Flash memory. The ISPVx
Firmware enables In-System-Programming of the
VRS51C1100 on the final application PCB using the
UART interface.
The VRS51C1100 can be ordered with or without the
ISPVx
bootloader
firmware
(see
the
ordering
information section of this datasheet for part number
information).
See the following figure for a hardware configuration
example. Other configurations are also possible.
FIGURE 5: VRS51C1100 INTERFACE FOR IN-SYSTEM PROGRAMMING
VRS51C1100
RXD
TXD
RES
Creset
To PC
150k
PNP
Rreset
(with ISPV2
Firmware)
Visit the Ramtron web site to download the “Versa
Ware ISP” Window™’s application, which enables
communication with the ISPVx firmware.
The
ISPVx
bootloader
firmware
can
also
be
programmed into the VRS51C1000 by the user.
Source code is included with the Versa Ware ISP
application software.
For more information on the ISPVx firmware, please
consult the “VRS51C1100 ISPVx Firmware User
Guide.pdf,” available on the Ramtron web site.
Note: The current ISPVx firmware and Versa Ware
software does not allow VRS51C1100 Data Flash
programming. Future versions of both will provide
support for VRS51C1100 Data Flash programming.
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