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MSK645B Datasheet(PDF) 3 Page - M.S. Kennedy Corporation |
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MSK645B Datasheet(HTML) 3 Page - M.S. Kennedy Corporation |
3 / 6 page APPLICATION NOTES BLACK LEVEL CONTROL Unlike many currently available video amplifiers, the MSK 645 is a D.C. coupled device. D.C. coupling affords the user direct black level control. A video input voltage of approximately 0.85 volts will set the output voltage to 50VDC (black level for +VHV=60VDC). Black level control grants the user flexibility in the application of the amplifier. For example, the user could apply a 0.85VDC level to the video input to bias the output at the black level (approximately 50V for VHV=60V) and have input video information swing from 0.85 to 1.5V causing the output to swing from the black level towards white (zero). This configuration would dissipate the least amount of power and is most common. Another possible circuit configuration could be to D.C. bias the video input pin so that the output is at 1/2VHV. The output video signal could then swing linearly from (+VHV-10V) to (ground + 10V). Careful consideration must be paid to device power dissipation in this configuration since it will be very high. VBIAS INPUT The VBIAS pin is connected to the base of the cascode tran- sistor in the equivalent schematic. The purpose of the cascode transistor is to isolate the input transistor from the high volt- age supply. The input transistor must have a very high transi- tion frequency specification and this is difficult to find in high voltage transistors. By using the cascode transistor to relieve the input transistor of its high BVceo requirement, high speed, low breakdown transistors can be used. The voltage applied to pin three minus a base to emitter voltage drop of approxi- mately 0.6 volts is the voltage present at the collector of the input transistor that acts as the voltage to current convertor. The voltage applied to the VBIAS pin has a practical upper limit of 10.0 volts. Above 10.0 volts the device may not be able to reach white level without going into cutoff. The practical lower limit for this pin is approximately 2.0 volts. Below 2.0 volts the input transistor will be dangerously close to cutoff. The MSK 645 functions best with VBIAS set to 5.0 volts ±1.0 volt. OUTPUT CONSIDERATIONS The output of the MSK 645 is driven by a complimentary push-pull buffer. The output stage isolates the capacitive load from the amplifier thereby making rising and falling edges rela- tively load independent. The bandwidth of the MSK 645 is limited by the RC time constant made up of the resistance from +VHV to the base of the NPN buffer and the capacitance from the NPN buffer base to ground. The coils in the equiva- lent schematic are chosen at the factory to moderately peak the amplifiers response (10%). For application specific user adjustable peaking, see the Typical Connection Circuit page. OUTPUT PROTECTION High voltage arcing can occur in the CRT being driven and cause severe damage to the MSK 645 output unless certain precautions are taken. The clamp diodes D1 and D2 (see fig- ure 1) will keep the voltage at the output at a safe level. These diodes should have a low series resistance and shunt capaci- tance as well as a high surge rating (FDH400 is recommended). In the event of an arcover, Rb limits the current flowing through the clamp diode and Ra limits the current into the MSK 645 output. The recommended values shown in figure 1 should not be deviated from without checking the monitor performance since increasing these values will adversely affect transistion times. HEAT SINK SELECTION To calculate what size heat sink is needed for a particular ap- plication, the following formula must be used: Tj = Pd (R θjc + Rθsa) + Ta where: Tj=junction temperature = 150°C max. R θjc=30°C/W max. Ta is the ambient temperature and Pd is the device power dis- sipation. R θsa is the heat sink thermal resistance. EXAMPLE: In an application an MSK 645 is dissipating 4 watts of power and the ambient temperature is +25°C. Plugging in all the known variables and rearranging the equation it can be seen that: R θsa = ((150°C - 25°C)/4W) - 30°C/W = 1.2°C/W A heat sink with a thermal resistance of no more than 1.2°C/W must be used to maintain a junction temperature of 150°C max. POWER DISSIPATION The most efficient method to reduce device power dissipa- tion when using the MSK 645 is to fix the black level at a point as close to +VHV as possible and maintain the peak to peak video output voltage to as small an excursion as possible. The case of the MSK 645 is electrically isolated from internal cir- cuitry and therefore the user should attach the heat sink di- rectly to the case of the device. POWER SUPPLY DECOUPLING Both the +VHV and the VBIAS input pins are decoupled inter- nally with 0.1µF capacitors to contain line noise. However it is good practice to decouple the MSK 645 externally with at least a 4.7µF electrolytic capacitor placed as close as possible to the associated device pins. Rev. D 10/05 3 |
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