3

LNK562-564

F

10/05

The oscillator incorporates circuitry that introduces a small

amount of frequency jitter, typically 5% of the switching

frequency, to minimize EMI. The modulation rate of the

frequency jitter is set to 1 kHz to optimize EMI reduction

for both average and quasi-peak emissions. The frequency

jitter, which is proportional to the oscillator frequency, should

be measured with the oscilloscope triggered at the falling

edge of the DRAIN voltage waveform. The waveform in

Figure 4 illustrates the frequency jitter. The oscillator frequency

is reduced when the FB pin voltage is less than 1.69 V as

described below.

Feedback Input Circuit

The feedback input circuit at the FB pin consists of a low

impedance source follower output set at 1.69 V. When the current

delivered into this pin exceeds 70

µA, a low logic level (disable)

is generated at the output of the feedback circuit. This output

is sampled at the beginning of each cycle on the rising edge of

the clock signal. If high, the power MOSFET is turned on for

that cycle (enabled), otherwise the power MOSFET remains

off (disabled). Since the sampling is done only at the beginning

of each cycle, subsequent changes in the FB pin voltage or

current during the remainder of the cycle are ignored. When

the FB pin voltage falls below 1.69 V, the oscillator frequency

linearly reduces to typically 48% at the auto-restart threshold

voltage of 0.8 V. This function limits the power supply output

current at output voltages below the rated voltage regulation

threshold V

5.8 V Regulator and 6.3 V Shunt Voltage Clamp

The 5.8 V regulator charges the bypass capacitor connected to

the BYPASS pin to 5.8 V by drawing a current from the voltage

on the DRAIN, whenever the MOSFET is off. The BYPASS

pin is the internal supply voltage node. When the MOSFET

is on, the device runs off of the energy stored in the bypass

capacitor. Extremely low power consumption of the internal

circuitry allows LinkSwitch-LP to operate continuously from the

current drawn from the DRAIN pin.Abypass capacitor value of

0.1

µF is sufficient for both high frequency decoupling and

energy storage.

In addition, there is a 6.3 V shunt regulator clamping the

BYPASS pin at 6.3 V when current is provided to the BYPASS

pin externally. This facilitates powering the device externally

through a resistor from the bias winding to decrease the no-

load consumption.

BYPASS Pin Under-Voltage

The BYPASS pin under-voltage circuitry disables the power

MOSFET when the BYPASS pin voltage drops below 4.85 V.

Once the BYPASS pin voltage drops below 4.85 V, it must rise

back to 5.8 V to enable (turn-on) the power MOSFET.

Over-Temperature Protection

The thermal shutdown circuitry senses the die temperature.

The threshold is set at 142

°C typical with a 75 °C hysteresis.

When the die temperature rises above this threshold (142

°C)

the power MOSFET is disabled and remains disabled until the

die temperature falls by 75

°C, at which point the MOSFET

is re-enabled.

Current Limit

The current limit circuit senses the current in the power MOSFET.

When this current exceeds the internal threshold (I

power MOSFET is turned off for the remainder of that cycle. The

leading edge blanking circuit inhibits the current limit comparator

for a short time (t

leading edge blanking time has been set so that current spikes

caused by capacitance and rectifier reverse recovery time will

not cause premature termination of the MOSFET conduction.

Auto Restart

In the event of a fault condition such as output short circuit or

an open loop condition, LinkSwitch-LP enters into auto-restart

operation.An internal counter clocked by the oscillator gets reset

every time the FB pin voltage exceeds the FEEDBACK Pin

Auto-Restart Threshold Voltage (V

drops below V

switching is disabled. The auto-restart alternately enables and

disables the switching of the power MOSFET at a duty cycle

of typically 12% until the fault condition is removed.

Figure 4. Frequency Jitter at f

600

020

68 kHz

64 kHz

V

DRAIN

Time (

µs)

500

400

300

200

100

0