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DP8521AV-25 Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8521AV-25
Description  DP8520A/DP8521A/DP8522A microCMOS Programmable 256k/1M/4M Video RAM Controller/Drivers
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8521AV-25 Datasheet(HTML) 2 Page - National Semiconductor (TI)

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Table of Contents
10 INTRODUCTION
20 SIGNAL DESCRIPTIONS
21 Address RW and Programming Signals
22 VRAM Control Signals
23 Refresh Signals
24 Port A Access Signals
25 Port B Access Signals (DP8522A)
26 Common Dual Port Signals (DP8522A)
27 Power Signals and Capacitor Input
28 Clock Inputs
30 PORT A ACCESS MODES
31 Access Mode 0
32 Access Mode 1
40 REFRESH OPTIONS
41 Refresh Control Modes
411 Automatic Internal Refresh
412 Externally ControlledBurst Refresh
413 Refresh RequestAcknowledge
42 Refresh Cycle Types
421 Conventional Refresh
422 Staggered Refresh
423 Error Scrubbing Refresh
43 Extending Refresh
44 Clearing the Refresh Address Counter
45 Clearing the Refresh Request Clock
50 PORT A WAIT STATE SUPPORT
51 WAIT Type Output
52 DTACK Type Output
53 Wait State Support for VRAM Transfer Cycles
54 Dynamically Increasing the Number of Wait States
55 Guaranteeing RAS Low Time and RAS Precharge
Time
60 DP8520A21A22A VIDEO RAM SUPPORT
61 Support for VRAM Transfer Cycles
62 Support for VRAM Access Cycles through Port A
70 ADDITIONAL ACCESS SUPPORT FEATURES
71 Address Latches and Column Increment
72 Address Pipelining
73 Delay CAS During Write Accesses
80 RAS AND CAS CONFIGURATION MODES
81 Byte Writing
82 Memory Interleaving
83 Address Pipelining
84 Error Scrubbing
85 PageBurst Mode
90 PROGRAMMING AND RESETTING
91 Mode Load Only Programming
92 Chip Selected Access Programming
93 External Reset
94 Definition of Programming Bits
100 TEST MODE
110 VRAM CRITICAL TIMING OPTIONS
111 Programming Values of tRAH and tASC
112 Calculation of tRAH and tASC
120 DUAL ACCESSING (DP8522A)
121 Port B Access Mode
122 Port B Wait State Support
123 Common Port A and Port B Dual Port Functions
1231 GRANTB Output
1232 LOCK Input
130 ABSOLUTE MAXIMUM RATINGS
140 DC ELECTRICAL CHARACTERISTICS
150 AC TIMING PARAMETERS
160 FUNCTIONAL DIFFERENCES BETWEEN THE
DP8520A21A22A AND THE DP85202122
170 DP8520A21A22A USER HINTS
180 DESCRIPTION OF A DP8522ADP8500
SYSTEM INTERFACE
2


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