Corporation

SIGNAL PROCESSING EXCELLENCE

162

PIN ASSIGNMENTS…

Pin 1 – IO

Pin 2 – IO

Pin 3 – GND – Ground.

Pin 4 – DB

Pin 5 – DB

Pin 6 – DB

Pin 7 – DB

Pin 8 – DB

Pin 9 – DB

Pin 10 – DB

Pin 11 – DB

Pin 12 – DB

Pin 13 – DB

Pin 14 – DB

Pin 15 – DB

Pin 16 – DB

Pin 17 – DB

Pin 18 – V

Pin 19 – V

Pin 20 – R

PRINCIPLES OF OPERATION

TheSP7514/HS3140achievehighaccuracybyusing

a decoded or segmented DAC scheme to implement

this function. The following is a brief description of

this approach.

The most common technique for building a D/A

converter of n bits is to use n switches to turn n current

or voltage sources on or off. The n switches and n

sourcesaredesignedsothateachswitchorbitcontrib-

utestwiceasmuchtotheD/Aconverter’soutputasthe

preceding bit. This technique is commonly known as

binary weighting and allows an n-bit converter to

combination of bits.

In such binary-weighted converter, the switch

with the smallest contribution (the LSB) accounts

Similarly, the switch with the largest contribution

full-scale output. Thus it is easy to see that a given

percent change in the MSB will have a greater

effect on the converter’s output than would a

similar percent change in the LSB. For example, a

1% change in the LSB of a 10 bit converter would

only affect the output by 0.001% of full-scale. A

1% change in the MSB of the same converter

would affect the output by 0.5% of FSR.

In order to overcome the problem which results from

the large weighting of the MSB, the two MSB’s can

be decoded to three equally weighted sources. Table

1 shows that all combinations of the two MSB’s of a

converter result in four output levels. So by replacing

the two MSB’s with three bits equally weighted at 1/

4 full-scale and decoding the two MSB digital inputs

into three lines which drive the equally weighted bits,

the same functional performance can be obtained.

ThusbyreplacingthetwoMSBswitchesofaconven-

tional converter with three switches properly de-

coded, the contribution of any switch is reduced from

1/2to1/4.Thisreductioninsensitivityalsoreducesthe

FEATURES…

The SP7514 and HS3140 are precision 14-bit multi-

plying DACs. The DACs are implemented as a one-

chip CMOS circuit with a resistor ladder network.

Three output lines are provided on the DACs to allow

unipolar and bipolar output connection with a mini-

mum of external components. The feedback resistor

is internal. The resistor ladder network termination is

externally available, thus eliminating an external re-

sistor for the 1 LSB offset in bipolar mode.

The SP7514 is available for use in commercial and

industrial temperature ranges, packaged in a 20-pin

SOIC. The HS3140 is available in commercial

and military temperature ranges, packaged in a

20–pin side–brazed DIP. For product processed

and screened to the requirements of MIL–M–

38510 and MIL–STD–883C, please consult the

factory (HS3140B only).

Figure 1. SP7514/HS3140 Equivalent Output Circuit

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Cf

C

Rp

Rf

CO

Ri

VREF