7

Figure 7. Recommended Decoupling and Termination Circuits

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NO INTERNAL CONNECTION

NO INTERNAL CONNECTION

HFBR-5805

TOP VIEW

V

EE

RD

RD

SD

V

CC

V

CC

TD

TD

V

EE

1

2

34

56

7

8

9

C1

C2

L1

L2

R2

R3

R1

R4

C5

C3

C4

R9

R10

V

AT V

TRANSCEIVER

R5

R7

R6

R8

C6

RD

RD

SD

V

CC

TD

TD

TERMINATION

AT PHY

DEVICE

INPUTS

NOTES:

THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT

OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT

BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.

R1 = R4 = R6 = R8 = R10 = 130 OHMS FOR +5.0 V OPERATION, 82 OHMS FOR +3.3 V OPERATION.

R2 = R3 = R5 = R7 = R9 = 82 OHMS FOR +5.0 V OPERATION, 130 OHMS FOR +3.3 V OPERATION.

C1 = C2 = C3 = C5 = C6 = 0.1 µF.

C4 = 10 µF.

L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.

TERMINATION

AT TRANSCEIVER

INPUTS

Rx

Rx

Tx

Tx

V

CC

V

CC

Rx

Tx

Recommended Handling Precautions

Agilent recommends that

normal static precautions be

taken in the handling and

assembly of these transceivers

to prevent damage which may

be induced by electrostatic

discharge (ESD).

The HFBR-5800 series of

transceivers meet MIL-STD-

883C Method 3015.4 Class 2

products.

Care should be used to avoid

shorting the receiver data or

signal detect outputs directly

to ground without proper

current limiting impedance.

Solder and Wash Process

Compatibility

The transceivers are delivered

with protective process plugs

inserted into the duplex SC or

duplex ST connector

receptacle. This process plug

protects the optical

subassemblies during wave

solder and aqueous wash

processing and acts as a dust

cover during shipping.

These transceivers are compat-

ible with either industry

standard wave or hand solder

processes.

Shipping Container

The transceiver is packaged in

a shipping container designed

to protect it from mechanical

and ESD damage during

shipment or storage.

Board Layout - Decoupling Circuit

and Ground Planes

It is important to take care in

the layout of your circuit

board to achieve optimum

performance from these

transceivers. Figure 7 provides

a good example of a schematic

for a power supply decoupling

circuit that works well with

these parts. It is further

recommended that a

contiguous ground plane be

provided in the circuit board

directly under the transceiver

to provide a low inductance

ground for signal return

current. This recommendation

is in keeping with good high

frequency board layout

practices.

Board Layout - Hole Pattern

The Agilent transceiver

complies with the circuit board

“Common Transceiver

Footprint” hole pattern defined

in the original multisource

announcement which defined

the 1 x 9 package style. This

drawing is reproduced in

Figure 8 with the addition of

ANSI Y14.5M compliant

dimensioning to be used as a

guide in the mechanical layout

of your circuit board.