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MAX8759ETI Datasheet(PDF) 4 Page - Marktech Corporate |
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MAX8759ETI Datasheet(HTML) 4 Page - Marktech Corporate |
4 / 31 page Low-Cost, SMBus, CCFL Backlight Controller 4 _______________________________________________________________________________________ ELECTRICAL CHARACTERISTICS (continued) (Circuit of Figure 1, VBATT = 12V, VCC = VDD, TA = 0°C to +85°C. Typical values are at TA = +25 °C, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS VBATT = 9V, RTHR = 120k Ω 0 0.15 0.30 Zero-Crossing Delay VBATT = 12V, RTHR = 120k Ω 1.50 1.80 2.10 µs Maximum Zero-Crossing Delay VBATT = 18V, RTHR = 120k Ω 3.2 3.8 4.4 µs DEL rising 4.5 DEL Disable Threshold DEL falling 3.8 V VISEC < 1.25V and VIFB < 540mV; VFLT = 2V 0.9 1.0 1.1 VISEC < 1.25V and VIFB > 660mV; VFLT = 2V -1.5 -1.2 -0.8 TFLT Charge Current VISEC > 1.25V and VIFB > 660mV; VFLT = 2V 115 135 155 µA TFLT Trip Threshold Rising edge 3.7 4 4.3 V SDA, SCL, Input Low Voltage 0.7 V SDA, SCL, Input High Voltage 2.1 V SDA, SCL, Input Hysteresis 100 mV SDA, SCL, Input Bias Current -1 +1 µA SDA Output Low Sink Current VSDA = 0.4V 4 mA SMBus Frequency 10 100 kHz SMBus Free Time tBUF 4.7 1 µs SCL Serial Clock High Period tHIGH 4µs SCL Serial Clock Low Period tLOW 4.7 µs START Condition Setup Time tSU:STA 4.7 µs START Condition Hold Time tHD:STA 4µs STOP Condition Setup Time from SCL tSU:STO 4µs SDA Valid to SCL Rising-Edge Setup Time, Slave Clocking in Data tSU:DAT 250 ns SCL Falling Edge to SDA Transition tHD:DAT 0ns SCL Falling Edge to SDA Valid, Reading Out Data tDV 200 ns |
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