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IDT71T016SA20PHI Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT71T016SA20PHI Datasheet(HTML) 2 Page - Integrated Device Technology |
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2 / 9 page  6.42 2 IDT71T016SA, 2.5V CMOS Static RAM 1 Meg (64K x 16-Bit) Commercial and Industrial Temperature Ranges 1 2 3 456 A BLE OE A0 A1 A2 NC BI/O8 BHE A3 A4 CS I/O0 CI/O9 I/O10 A5 A6 I/O1 I/O2 DVSS I/O11 NC A7 I/O3 VDD EVDD I/O12 NC NC I/O4 VSS FI/O14 I/O13 A14 A15 I/O5 I/O6 GI/O15 NC A12 A13 WE I/O7 HNC A8 A9 A10 A11 NC 5326 tbl 02a Pin Configurations TSOP Top View Pin Description Truth Table(1) NOTE: 1. H = VIH, L = VIL, X = Don't care. A0 – A15 Address Inputs Input CS Chip Select Input WE Write Enable Input OE Output Enable Input BHE High Byte Enable Input BLE Low Byte Enable Input I/O0 – I/O15 Data Input/Output I/O VDD 2.5V Power Power VSS Ground Gnd 5326 tbl 01 CS OE WE BLE BHE I/O0-I/O7 I/O8-I/O15 Function H X X X X High-Z High-Z Deselected – Standby LL H L H DATAOUT High-Z Low Byte Read LL H H L High-Z DATAOUT High Byte Read LL H L L DATAOUT DATAOUT Word Read LX L L L DATAIN DATAIN Word Write LX L L H DATAIN High-Z Low Byte Write LX L H L High-Z DATAIN High Byte Write L H H X X High-Z High-Z Outputs Disabled L X X H H High-Z High-Z Outputs Disabled 5326 tbl 02 FBGA (BF48-1) Top View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 I/O7 NC A12 A13 A14 A15 WE I/O6 I/O5 I/O4 VSS VDD I/O3 I/O2 I/O1 I/O0 CS A0 A1 A2 A3 A4 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A6 A7 OE BHE BLE I/O15 I/O14 I/O13 I/O12 VSS VDD I/O11 I/O10 I/O9 I/O8 A8 A9 A10 A11 NC A5 NC SO44-1 SO44-2 5326 drw 02 |
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