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TPS40041DRBR Datasheet(PDF) 10 Page - Texas Instruments

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Part # TPS40041DRBR
Description  LOW PIN COUNT, LOW VIN (2.5 V TO 5.5 V) SYNCHRONOUS BUCK DC-TO-DC CONTROLLER WITH ENABLE
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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TPS40041DRBR Datasheet(HTML) 10 Page - Texas Instruments

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APPLICATION INFORMATION
Functional Description
Voltage Reference
Voltage Error Amplifier
Loop Compensation
Oscillator
UVLO
TPS40040, TPS40041
SLUS700B – MARCH 2006 – REVISED MARCH 2006
The TPS40040 (300 kHz) and TPS40041 (600 kHz) are fixed-frequency voltage-mode synchronous buck
controllers. In operation, the synchronous rectifier (SR) is allowed to conduct current in both directions, allowing a
converter to operate in continuous mode, even under no load conditions, simplifying feedback loop compensation
requirements. During startup, internal circuitry modulates the switching of the synchronous rectifier to prevent
discharging of the output if a pre-biased condition exists.
The 600-mV bandgap reference voltage cell is internally connected to the non-inverting input of the error
amplifier. The voltage reference is trimmed with the error amplifier in a unity gain configuration to remove
amplifier offset from the final regulation voltage.
The error amplifier has a bandwidth of greater than 5 MHz, and open loop gain of at least 55 dB. The output
voltage swing is limited to just above and below the oscillator ramp levels to improve transient response.
Voltage mode buck type converters are typically compensated using Type III networks. Please refer to the
Design Example for detailed methodology in designing feedback loops for voltage mode converters.
The oscillator frequency is internally fixed. The TPS40040/1 operating frequencies are 300 kHz/600 kHz,
respectively.
When the input voltage is below the UVLO threshold, the TPS40040/1 turns off the internal oscillator and holds
all gate drive outputs in the low (OFF) state. When the input rises above the UVLO threshold, and the EN pin is
below the turn ON threshold, the start-up sequence is allowed to begin.
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