7

®

DAC667

FIGURE 5. Power Supply, Gain and Offset Connections.

100

Ω

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

100

Ω

V

OUT

100k

Ω

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

100

Ω

V

OUT

–V

CC

Bipolar

Unipolar

(2)

50k

Ω

0.01µF

0.01µF

+V

CC

NOTES:

(1) 10µF tantalum for

optimum settling

performance.

(2) Unipolar offset adjust is

not necessary in most

applications.

(3) For the ceramic pack-

age, the lid is connec-

ted to –V

REF OUT

REF IN

CC

OUT

EE

20V Span

10V Span

Sum Jct.

Bipolar Off.

AGND

V

V

+V

V

–V

CS

A3

A2

A1

DB11

DB10

DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

Pwr Gnd

A0

(1)

0.01µF

(1)

0.01µF

+V

CC

+V

CC

–V

CC

(3)

–V

CC

(3)

LSB

MSB

REF OUT

REF IN

CC

OUT

EE

20V Span

10V Span

Sum Jct.

Bipolar Off.

AGND

V

V

+V

V

–V

CS

A3

A2

A1

DB11

DB10

DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

Pwr Gnd

A0

100

Ω

LSB

MSB

5k

Ω

9.95k

Ω

9

1

4

Bipolar

Offset

20V Span

V

OUT

I

DAC

5

AGND

5k

Ω

2

10V Span

3

Summing

Junction

FIGURE 6. Output Amplifier Voltage Range Scaling Circuit.

9

3

4

Bipolar

Offset

Summing Junction

V

OUT

I

DAC

5

AGND

5k

Ω

9.95k

Ω

2

10V Span

5k

Ω

1

20V Span

0 to +10V

100

Ω

100k

Ω

50k

Ω

+V

CC

–V

EE

V

OUT

Increase

FIGURE 7. 0 to +10V Unipolar Voltage Output.

9

3

4

Bipolar Offset

Summing Junction

V

OUT

I

DAC

5

AGND

5k

Ω

9.95k

Ω

2

10V Span

5k

Ω

1

20V Span

±5V

100

Ω

6

V

REF OUT

V

OUT

Decrease

MICROCOMPUTER

BUS INTERFACING

8-BIT BUS INTERFACE

The DAC667 interfaces easily to 8-bit microprocessor sys-

tems of all types. The control logic makes possible the use

of right- or left-justified data formats. Data formats for 8-bit

buses are illustrated in Figure 9.

FIGURE 8.

±5V Bipolar Voltage Output.