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AKD4122 Datasheet(PDF) 6 Page - Asahi Kasei Microsystems |
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AKD4122 Datasheet(HTML) 6 Page - Asahi Kasei Microsystems |
6 / 36 page ASAHI KASEI [AKD4122] <KM071100> 2003/06 - 6 - (2) Setting for Input port (AK4122 PORT2) (2-1) Slave mode 1. When using DIR function of AK4114 (U13) When using PORT6 (DIR2), nothing should be connected to J2 (EXT2) and PORT7 (DSP2). Set JP18 (MCLK2) to the “DIR” when MCLK is supplied to the AK4122. JP15 SDTIO JP16 BICK2 EXT DIR JP17 LRCK2 EXT DIR JP18 MCLK2 EXT DIR • SW3 setting (See Table 3, 4, 5) Upper-side is “H” and lower-side is “L”. SW3 No. Name ON (“H”) OFF (“L”) 1 OCKS AK4114 Master Clock Output Setting Refer to Table 4 2 DIF0 3 DIF1 4 DIF2 AK4114 Audio Format Setting Refer to Table 5 Table 3. SW3 setting Mode OCKS MCKO1 X’tal fs 0 0 256fs 256fs ∼ 96kHz Default 1 1 512fs 512fs ∼ 48kHz Table 4. AK4114 MCKO1 setting AK4114 AK4122 Mode Audio I/F Format DIF2 DIF1 DIF0 IDIF1 IDIF0 0 16bit, LSB justified 0 0 0 0 0 1 24bit, MSB justified 1 0 0 0 1 Default 2 24bit, I 2S Compatible 1 0 1 1 0 3 24bit, LSB justified 0 1 1 1 1 Table 5. AK4114 Audio interface format setting * IDIF1-0 of the AK4122 is set by the register. |
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