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PDU53-500C3 Datasheet(PDF) 2 Page - Data Delay Devices, Inc. |
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PDU53-500C3 Datasheet(HTML) 2 Page - Data Delay Devices, Inc. |
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2 / 4 page  PDU53 APPLICATION NOTES ADDRESS UPDATE The PDU53 is a memory device. As such, special precautions must be taken when changing the delay address in order to prevent spurious output signals. The timing restrictions are shown in Figure 1. After the last signal edge to be delayed has appeared on the OUT pin, a minimum time, TOAX, is required before the address lines can change. This time is given by the following relation: TOAX = max { (Ai - A i-1) * TINC , 0 } where A i-1 and Ai are the old and new address codes, respectively. Violation of this constraint may, depending on the history of the input signal, cause spurious signals to appear on the OUT pin. The possibility of spurious signals persists until the required TOAX has elapsed. INPUT RESTRICTIONS There are three types of restrictions on input pulse width and period listed in the AC Characteristics table. The recommended conditions are those for which the delay tolerance specifications and monotonicity are guaranteed. The suggested conditions are those for which signals will propagate through the unit without significant distortion. The absolute conditions are those for which the unit will produce some type of output for a given input. When operating the unit between the recommended and absolute conditions, the delays may deviate from their values at low frequency. However, these deviations will remain constant from pulse to pulse if the input pulse width and period remain fixed. In other words, the delay of the unit exhibits frequency and pulse width dependence when operated beyond the recommended conditions. Please consult the technical staff at Data Delay Devices if your application has specific high-frequency requirements. Please note that the increment tolerances listed represent a design goal. Although most delay increments will fall within tolerance, they are not guaranteed throughout the address range of the unit. Monotonicity is, however, guaranteed over all addresses. PACKAGE DIMENSIONS .870 ±.010 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 .380 MAX. .015 TYP. .070 MAX. .018 TYP. .700 ±.010 7 Equal spaces each .100 ±.010 Non-Accumulative .580 MAX. .600 ±.00 .010 ±.002 Lead Material: Nickel-Iron alloy 42 TIN PLATE PDU53-xx (Commercial DIP) PDU53-xxM (Military DIP) Doc #98003 DATA DELAY DEVICES, INC. 2 3/18/98 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com |
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