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3D7314D-400 Datasheet(PDF) 1 Page - Data Delay Devices, Inc. |
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3D7314D-400 Datasheet(HTML) 1 Page - Data Delay Devices, Inc. |
1 / 4 page 3D7314 MONOLITHIC QUADRUPLE FIXED DELAY LINE (SERIES 3D7314) FEATURES • All-silicon, low-power CMOS technology • TTL/CMOS compatible inputs and outputs • Vapor phase, IR and wave solderable • Auto-insertable (DIP pkg.) • Low ground bounce noise • Leading- and trailing-edge accuracy • Delay range: 10 through 500ns • Delay tolerance: 2% or 1.0ns • Temperature stability: ±1% typical (0C-70C) • Vdd stability: ±1% typical (4.75V-5.25V) • Minimum input pulse width: 20% of total delay • Static Idd: 1.3ma typical • Minimum input pulse width: 25% of total delay FUNCTIONAL DESCRIPTION The 3D7314 Quadruple Delay Line product family consists of fixed- delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 500ns. The input is reproduced at the output without inversion, shifted in time as per the user-specified dash number. The 3D7314 is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads, and features both rising- and falling-edge accuracy. The all-CMOS 3D7314 integrated circuit has been designed as a reliable, economic alternative to hybrid TTL fixed delay lines. It is offered in a standard 14-pin auto-insertable DIP and a space saving surface mount 14-pin SOIC. PACKAGES 14 13 12 11 10 9 8 1 2 3 4 5 6 7 I1 N/C I2 I3 I4 N/C GND VDD N/C O1 N/C O2 O3 O4 3D7314-xx DIP 3D7314G-xx Gull-Wing 1 2 3 4 5 6 7 14 13 12 11 10 9 8 I1 N/C I2 I3 I4 N/C GND VDD N/C O1 N/C O2 O3 O4 3D7314D-xx SOIC (150 Mil) PIN DESCRIPTIONS I1 Delay Line 1 Input I2 Delay Line 2 Input I3 Delay Line 3 Input I4 Delay Line 4 Input O1 Delay Line 1 Output O2 Delay Line 2 Output O3 Delay Line 3 Output O4 Delay Line 4 Output VDD +5 Volts GND Ground N/C No Connection TABLE 1: PART NUMBER SPECIFICATIONS PART NUMBER DELAY INPUT RESTRICTIONS DIP-14 3D7314 DIP-14 3D7314G SOIC-14 3D7314D PER LINE (ns) Max Operating Frequency Absolute Max Oper. Freq. Min Operating Pulse Width Absolute Min Oper. P.W. -10 -10 -10 10 ± 1.0 33.3 MHz 100.0 MHz 15.0 ns 5.0 ns -15 -15 -15 15 ± 1.0 22.2 MHz 100.0 MHz 22.5 ns 5.0 ns -20 -20 -20 20 ± 1.0 16.7 MHz 100.0 MHz 30.0 ns 5.0 ns -25 -25 -25 25 ± 1.0 13.3 MHz 83.3 MHz 37.5 ns 6.0 ns -30 -30 -30 30 ± 1.0 11.1 MHz 71.4 MHz 45.0 ns 7.0 ns -40 -40 -40 40 ± 1.0 8.33 MHz 62.5 MHz 60.0 ns 8.0 ns -50 -50 -50 50 ± 1.0 6.67 MHz 50.0 MHz 75.0 ns 10.0 ns -100 -100 -100 100 ± 2.0 3.33 MHz 25.0 MHz 150.0 ns 20.0 ns -200 -200 -200 200 ± 4.0 1.67 MHz 12.5 MHz 300.0 ns 40.0 ns -300 -300 -300 300 ± 6.0 1.11 MHz 8.33 MHz 450.0 ns 60.0 ns -400 -400 -400 400 ± 8.0 0.83 MHz 6.25 MHz 600.0 ns 80.0 ns -500 -500 -500 500 ± 10.0 0.67 MHz 5.00 MHz 750.0 ns 100.0 ns NOTES: Any delay between 10 and 500 ns not shown is also available. 2003 Data Delay Devices For mechanical dimensions, click here. For package marking details, click here. Doc #03005 DATA DELAY DEVICES, INC. 1 12/8/03 3 Mt. Prospect Ave. Clifton, NJ 07013 |
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