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ADCMP581BCP Datasheet(PDF) 11 Page - Analog Devices |
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ADCMP581BCP Datasheet(HTML) 11 Page - Analog Devices |
11 / 16 page Preliminary Technical Data ADCMP580/ADCMP581/ADCMP582 Rev. PrA | Page 11 of 16 COMPARATOR HYSTERESIS Adding hysteresis to a comparator is often desirable in a noisy environment or when the differential inputs are very small or slow moving. The transfer function for a comparator with hysteresis is shown in Figure 18. If the input voltage approaches the threshold from the negative direction, the comparator switches from a low to a high when the input crosses +VH/2. The new switching threshold becomes −VH/2. The comparator remains in the high state until the threshold −VH/2 is crossed coming from the positive direction. In this manner, noise centered on 0 V input does not cause the comparator to switch states unless it exceeds the region bounded by ±VH/2. The customary technique for introducing hysteresis into a comparator uses positive feedback from the output back to the input. A limitation of this approach is that the amount of hysteresis varies with the output logic levels, resulting in hysteresis that is not symmetric about the threshold. The external feedback network can also introduce significant parasitics that will reduce high speed performance, and can even reduce overall stability in some cases. The ADCMP58x family of comparators offers a programmable hysteresis feature that can significantly improve the accuracy and stability of the desired hysteresis. By connecting an external pull-down resistor from the HYS pin to VEE, a variable amount of hysteresis can be applied. Leaving the HYS pin disconnected disables the feature and hysteresis is then less than 1 mV as specified. The maximum range of hysteresis that can be applied by using this method is approximately ±25 mV. Figure 19 illustrates the amount of applied hysteresis as a function of external resistor value. The advantage of applying hysteresis in this manner is improved accuracy, stability, and reduced component count. An external bypass capacitor is not required on the HYS pin because it would likely degrade the jitter performance of the device. OUTPUT INPUT 0V 0 1 +VH 2 –VH 2 Figure 18. Comparator Hysteresis Transfer Function of the ADCMP580/ADCMP581 Figure 19. Comparator Hysteresis vs. RHYS Control Resistor MINIMUM INPUT SLEW RATE REQUIREMENT As with all high speed comparators, a minimum slew rate must be met to ensure that the device does not oscillate when the input signal crosses the threshold. This oscillation is due in part to the high input bandwidth of the comparator and the feedback parasitics inherent in the package. Analog Devices recommends a minimum slew rate of 50 V/µs to ensure a clean output transition from the ADCMP58x family of comparators unless hysteresis is programmed as discussed previously. |
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