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MB89PV530 Datasheet(PDF) 2 Page - Fujitsu Component Limited. |
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MB89PV530 Datasheet(HTML) 2 Page - Fujitsu Component Limited. |
2 / 62 page MB89530A Series 2 (Continued) • 10-bit A/D converter (8 channels) • External clock input for startup support • Time base timer output for startup support (except MB89F538) • Pulse generators (PPG) with 2-program capability • 6-bit PPG with selection of pulse width and pulse period • 12-bit PPG (2 channels) with selection of pulse width and pulse period •I2C interface circuits • External interrupt 1 (single-clock system : 4 channels, dual-clock system : 3 channels) • 4 or 3 independent inputs, release enabled from standby mode (includes edge detection function) • External interrupt 2 (8 channels) • 8 independent inputs, release enabled form standby mode (includes level edge detection function) • Standby modes (low power consumption modes) • Stop mode (oscillator stops, virtually no power consumed) • Sleep mode (CPU stops, power consumption reduced to one-third) • Sub clock mode • Watch mode • Watchdog timer reset • I/O ports • Maximum ports Single-clock system : Except MB89F538 53 ports : MB89F538 52 ports Dual-clock system : Except MB89F538 51 ports : MB89F538 50 ports • 38 general-purpose I/O ports (CMOS) (MB89F538 : 37 general-purpose I/O ports) • 2 general-purpose I/O ports (N-ch open drain) • 8 general-purpose output ports (N-ch open drain) • General-purpose input ports (CMOS) : single-clock system : 5 ports, dual-clock system : 3 ports s PACKAGES 64-pin, Plastic SH-DIP 64-pin, Plastic LQFP 64-pin, Plastic QFP (DIP-64P-M01) (FPT-64P-M03) (FPT-64P-M06) 64-pin, Plastic QFP 64-pin, Ceramic MDIP 64-pin, Ceramic MQFP (FPT-64P-M09) (MDP-64C-P02) (MQP-64C-P01) |
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