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MK32VT832 Datasheet(PDF) 4 Page - OKI electronic componets |
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MK32VT832 Datasheet(HTML) 4 Page - OKI electronic componets |
4 / 11 page MK32VT832-10YC Ñ98.07.21Ò Page 4/11 SERIAL PRESENCE DETECT Byte No. SPD Hex Value Remark Notes 0 80 Defines the number of bytes written into 128 byte SPD memory 1 08 Total number of bytes of SPD memory 256 byte 2 04 Fundamental memory type SDRAM 3 0C Number of rows 12 rows 4 08 Number of columns 8 columns 5 02 Number of module banks 2 bank 6 20 Data width of this assembly 32 bits 7 00 ... Data width continuation 0 8 01 Voltage interface level LVTTL 9 A0 Cycle time (CL=3) CL=3 tCC=10ns 10 90 Access time from CLK (CL=3) CL=3 tAC3=9ns 11 00 DIMM configuration type None Parity 12 80 Refresh rate / type Normal / Self 13 10 Primary SDRAM width x16 14 00 Error checking SDRAM width 15 01 Minimum CLK delay tCCD: 1 CLK 16 0E Burst lengths supported 2, 4, 8 17 04 Number of banks on each SDRAM 4 banks 18 06 /CAS latency 2, 3 19 01 /CS latency 0 20 01 /WE latency 0 21 00 SDRAM module attributes 22 06 SDRAM device attributes : General 23 F0 Cycle time (CL=2) CL=2 tCC2=15ns 24 90 Access time from CLK (CL=2) CL=2 tAC2=9ns 25 00 Cycle time (CL=1) Not support 26 00 Access time from CLK (CL=1) Not support 27 1E Minimum ROW pulse width tRP=30ns 28 14 /RAS to /RAS bank delay tRRD=20ns 29 1E /RAS to /CAS delay tRCD=30ns 30 3C Minimum /RAS precharge time tRAS=60ns 31 08 Density of each bank on module 32MB 32 30 Command and address signal input setup time 3ns 33 10 Command and address signal input hold time 1ns 34 30 Data signal input setup time 3ns 35 10 Data signal input hold time 1ns 36-61 00-00 Superset Information R.F.U 62 02 SPD data revision code 02 63 3A Checksum for byte 0-62 64-71 41,45,20,20,20,20,20,20 Manufacturer’s JEDEC ID code 72 01 / 06 Manufacturing location 73-90 4D,4B,33,32,56,54,38,33,32, 2D,31,30,59,43,20,20,20,20 Manufacturer’s part number MK32VT832-10YC 91, 92 20, 20 Revision code 93-125 00-00 R.F.U 126 66 Intel specification frequency 66MHz 127 06 Intel specification /CAS latency CL=2,3 128-255 FF-FF Unused storage locations |
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