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AN77L05M Datasheet(PDF) 5 Page - Panasonic Semiconductor |
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AN77L05M Datasheet(HTML) 5 Page - Panasonic Semiconductor |
5 / 8 page 5 Voltage Regulators AN77L00/AN77L00M Series Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient VO REGIN REGL Ibias ∆I bias Irush RR VDIF (min)1 VDIF (min) 2 Vno ∆V O/Ta Tj=25˚C VI=7.78 to 17.78V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI= 6.3V, IO= 0mA, Tj=25˚C VI=7.78 to 9.78V, f=120Hz VI= 6.3V, IO= 50mA, Tj=25˚C VI= 6.3V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 6.72 55 7.0 5 11 1.1 3 1.5 65 0.12 0.26 120 0.46 7.28 70 70 1.6 5 5 0.25 0.48 V mV mV mA mA mA dB V V µV mV/˚C Parameter Symbol Condition min typ max Unit s Electrical Characteristics (Ta=25˚C) • AN77L07/M (7V, 100mA Type) Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI= 8V, IO=50mA, CO=10 µF unless otherwise specified. Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient VO REGIN REGL Ibias ∆I bias Irush RR VDIF (min)1 VDIF (min) 2 Vno ∆V O/Ta Tj=25˚C VI= 8.82 to 18.82V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI=7.2V, IO= 0mA, Tj=25˚C VI= 8.82 to 10.82V, f=120Hz VI=7.2V, IO=50mA, Tj= 25˚C VI=7.2V, IO=100mA, Tj= 25˚C f=10Hz to 100kHz Tj= –30 to +125˚C 7.68 53 8 5 12 1.1 3 1.5 63 0.12 0.27 135 0.53 8.32 80 80 1.6 5 5 0.25 0.51 V mV mV mA mA mA dB V V µV mV/˚C Parameter Symbol Condition min typ max Unit • AN77L08/M (8V, 100mA Type) Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=9V, IO=50mA, CO=10 µF unless otherwise specified. Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient VO REGIN REGL Ibias ∆I bias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆V O/Ta Tj=25˚C VI=9.86 to 19.86V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI=8.1V, IO= 0mA, Tj=25˚C VI=9.86 to 11.86V, f=120Hz VI=8.1V, IO= 50mA, Tj=25˚C VI=8.1V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj=–30 to+125˚C 8.64 52 9 6 13 1.2 3 1.5 62 0.13 0.28 150 0.6 9.36 90 90 1.7 5 5 0.25 0.53 V mV mV mA mA mA dB V V µV mV/˚C Parameter Symbol Condition min typ max Unit • AN77L09/M (9V, 100mA Type) Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=10V, IO=50mA, CO=10 µF unless otherwise specified. |
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