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ML674000 Datasheet(PDF) 11 Page - OKI electronic componets

Part # ML674000
Description  32-bit General-purpose, ARM-based Microcontroller
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Manufacturer  OKI [OKI electronic componets]
Direct Link  http://www.oki.com
Logo OKI - OKI electronic componets

ML674000 Datasheet(HTML) 11 Page - OKI electronic componets

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FEDL674000-02
OKI Semiconductor
ML674000
11/24
Pin Name
I/O
Description
Primary/
Secondary
Logic
External Bus
XA[23:19]
O
Address bus to external RAM, external ROM, external I/O banks, and
external DRAM. After a reset, these pins are configured for their primary
function (PIOA[14:10]).
Secondary
Positive
XA[18:0]
O
Address bus to external RAM, external ROM, external I/O banks, and
external DRAM
Positive
XD[15:0]
I/O
Data bus to external RAM, external ROM, external I/O banks, and external
DRAM
Positive
External bus control signals
XROMCS_N
O
ROM bank chip select
Negative
XRAMCS_N
O
SRAM bank chip select
Negative
XIOCS_N[0]
O
I/O bank 0 chip select
Negative
XIOCS_N[1]
O
I/O bank 1 chip select
Negative
XOE_N
O
Output enable/read enable
Negative
XWE_N
O
Write enable
Negative
XBS_N[1:0]
O
Byte select: XBS_N[1] for MSB; XBS_N[0] for LSB
Negative
XBWE_N[0]
O
LSB write enable
Negative
XBWE_N[1]
O
MSB write enable
Negative
XWR
O
Data transfer direction for external bus, used when connecting to Motorola
I/O devices. This represents the secondary function of pin PIOA[15],
produced by setting bit 7 in the port control (GPCTL) register to "1."
Secondary
XWAIT
I
External I/O bank 0 WAIT signal.
This input permits access to devices slower than register settings.
Secondary
Positive
External bus control signals (DRAM)
XRAS_N
O
Row address strobe. Used for both EDO DRAM and SDRAM.
Secondary
Negative
XCAS_N
O
Column address strobe signal (SDRAM)
Secondary
Negative
XSDCLK
O
SDRAM clock (same frequency as internal system clock)
Secondary
XSDCKE
O
Clock enable (SDRAM)
Secondary
XSDCS_N
O
Chip select (SDRAM)
Secondary
Negative
XDQM[1]/
XCAS_N[1]
O
Connected to SDRAM: DQM (MSB)
Connected to EDO DRAM: column address strobe signal (MSB)
Secondary
Positive/
Negative
XDQM[0]/
XCAS_N[0]
O
Connected to SDRAM: DQM (LSB)
Connected to EDO DRAM: column address strobe signal (LSB)
Secondary
Positive/
Negative


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