IND16305

Korzhenevsky 12, Minsk, 220064, Republic of Belarus

Fax:

+375 (17) 278 28 22

Tel:

+375 (17) 278 49 09, 212 27 02

Tel/fax: +375 (17) 212 68 53

E-mail: office@bms.by

URL:

www.bms.by

2

PIN CONFIGURATION (Top View)

(connect at same point near IC).

• Pin 33 is connected to the lead frame, and must therefore be left open.

DESCRIPTION OF PINS

Pin Symbol

Pin Name

Pin No.

Description

BLK

Output blank input

37

See truth table

A

RIGHT data input/output

30

Serial data input/output* When R/L = H

A: Input B:Output

B

LEFT data input/output

35

When R/L = L A: Output B: Input

CLK

Clock input

31

Shift executed on rise

STB

Latch enable input

36

H: Latch, L: Data-through

R/L

Shift direction control input

25

H: Right shift modeA

L : Left shift mode B

CLR

Clear input

32

L: Shift register ALL L

PC

Polarity reversal input

27

See truth table

High withstand voltage outputs

1 to 20

45 to 64

200 V, 400 mA max.

Logic block power supply

26, 39

5 V ± 10 %

Driver block power supply

21, 44

30 V to 180 V

Logic block ground

24, 41

Connect to system GND

Driver block ground

22, 23, 42, 43

Connect to system GND at same point.

NC

Unused pins

28, 29, 33,

Non-connection

34, 38, 40

Ensure that pin 33 is left open.

* Data resulting from inversion of the data input is input to the shift register, and data resulting from inversion of the shift

register data is output to the output.

64

63

62

61

60

59

58

57

56

55

54

53

52

51

25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

1

3

4

5

6

7

8

9

10

11

13

14

15

16

17

19

20

21

22

23

24

12

50

49

48

47

46

45

44

43

42

41