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Z8F1621AN020EC Datasheet(PDF) 11 Page - Zilog, Inc. |
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Z8F1621AN020EC Datasheet(HTML) 11 Page - Zilog, Inc. |
11 / 299 page PS019915-1005 List of Figures Z8 Encore!® 64K Series Product Specification xi List of Figures Figure 1. Z8 Encore!® 64K Series Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Figure 2. 64K Series in 40-Pin Dual Inline Package (PDIP) . . . . . . . . . . . . . . . . . . . . 7 Figure 3. 64K Series in 44-Pin Plastic Leaded Chip Carrier (PLCC) . . . . . . . . . . . . . . 8 Figure 4. 64K Series in 44-Pin Low-Profile Quad Flat Package (LQFP) . . . . . . . . . . . 9 Figure 5. 64K Series in 64-Pin Low-Profile Quad Flat Package (LQFP) . . . . . . . . . . 10 Figure 6. 64K Series in 68-Pin Plastic Leaded Chip Carrier (PLCC) . . . . . . . . . . . . . 11 Figure 7. 64K Series in 80-Pin Quad Flat Package (QFP) . . . . . . . . . . . . . . . . . . . . . 12 Figure 8. Power-On Reset Operation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 9. Voltage Brown-Out Reset Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 10. GPIO Port Pin Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Figure 11. Interrupt Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Figure 12. Timer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Figure 13. UART Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Figure 14. UART Asynchronous Data Format without Parity . . . . . . . . . . . . . . . . . . 100 Figure 15. UART Asynchronous Data Format with Parity . . . . . . . . . . . . . . . . . . . . . 100 Figure 16. UART Asynchronous MULTIPROCESSOR Mode Data Format . . . . . . 104 Figure 17. UART Driver Enable Signal Timing (shown with 1 Stop Bit and Parity) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 Figure 18. UART Receiver Interrupt Service Routine Flow . . . . . . . . . . . . . . . . . . . 108 Figure 19. Infrared Data Communication System Block Diagram . . . . . . . . . . . . . . . 120 Figure 20. Infrared Data Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 Figure 21. Infrared Data Reception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Figure 22. SPI Configured as a Master in a Single Master, Single Slave System . . . 125 Figure 23. SPI Configured as a Master in a Single Master, Multiple Slave System . . 126 Figure 24. SPI Configured as a Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 Figure 25. SPI Timing When PHASE is 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 Figure 26. SPI Timing When PHASE is 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Figure 27. I2C Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 Figure 28. 7-Bit Address Only Transaction Format . . . . . . . . . . . . . . . . . . . . . . . . . . 144 Figure 29. 7-Bit Addressed Slave Data Transfer Format . . . . . . . . . . . . . . . . . . . . . . 145 Figure 30. 10-Bit Address Only Transaction Format . . . . . . . . . . . . . . . . . . . . . . . . . 146 Figure 31. 10-Bit Addressed Slave Data Transfer Format . . . . . . . . . . . . . . . . . . . . . 147 Figure 32. Receive Data Transfer Format for a 7-Bit Addressed Slave . . . . . . . . . . . 149 |
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