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Z86L991PZ008SC Datasheet(PDF) 4 Page - Zilog, Inc. |
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Z86L991PZ008SC Datasheet(HTML) 4 Page - Zilog, Inc. |
4 / 102 page Z86D990/Z86D991 OTP and Z86L99X ROM Low-Voltage Microcontrollers with ADC PS003807-1002 P R E L I M I N A R Y iv List of Figures Figure 1. Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 2. 48-Pin SSOP Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. 40-Pin DIP Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. 28-Pin SOIC/DIP Pin Assignment—User Mode . . . . . . . . . . . . . . . . 7 Figure 5. Program Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Standard Z8 Register File (Working Reg. Groups 0–F, Bank 0) . . . 13 Figure 7. Z8 Expanded Register File Architecture . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Interrupt Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 9. External Interrupt Sources IRQ0–IRQ2 Block Diagram . . . . . . . . . . 17 Figure 10. IRQ Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 11. Interrupt Request Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 12. General Input/Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 13. Analog Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 14. ADC Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 15. Low-Pass Filter (with 8-MHz Crystal) . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 16. Active Glitch/Power Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 17. I-V Characteristics for the Current Sink Pad P43 . . . . . . . . . . . . . . 34 Figure 18. T1 Counter/Timer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 19. Register File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 20. Prescaler 1 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 21. Counter/Timer 1 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 22. Timer Mode Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 23. Starting the Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 24. Counting Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 25. Timer Mode Register TOUT Operation . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 26. Counter/Timer Output Using TOUT . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 27. Internal Clock Output Using TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 28. Timer Mode Register TIN Operation . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 29. Prescaler 1 TIN Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 30. External Clock Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 31. Gated Clock Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 32. Triggered Clock Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 33. Counter/Timer Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 34. Transmit Mode Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 |
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