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ZLR32300P2832G Datasheet(PDF) 10 Page - Zilog, Inc. |
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ZLR32300P2832G Datasheet(HTML) 10 Page - Zilog, Inc. |
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10 / 98 page  CrimzonTM ZLR32300 Product Specification PS022607-1205 General Description 2 – Port 3: 0–3 pull-up transistors – WDT enabled at POR General Description The CrimzonTM ZLR32300 is an ROM-based member of the MCU family of infra- red microcontrollers. With 237B of general-purpose RAM and 4KB to 32KB of ROM, ZiLOG®’s CMOS microcontrollers offer fast-executing, efficient use of memory, sophisticated interrupts, input/output bit manipulation capabilities, auto- mated pulse generation/reception, and internal key-scan pull-up transistors. The CrimzonTM ZLR32300 architecture (Figure 1) is based on ZiLOG’s 8-bit microcontroller core with an Expanded Register File allowing access to register- mapped peripherals, input/output (I/O) circuits, and powerful counter/timer cir- cuitry. The Z8® offers a flexible I/O scheme, an efficient register and address space structure, and a number of ancillary features that are useful in many con- sumer, automotive, computer peripheral, and battery-operated hand-held applica- tions. There are three basic address spaces available to support a wide range of config- urations: Program Memory, Register File and Expanded Register File. The regis- ter file is composed of 256 Bytes (B) of RAM. It includes 4 I/O port registers, 16 control and status registers, and 236 general-purpose registers. The Expanded Register File consists of two additional register groups (F and D). To unburden the program from coping with such real-time problems as generating complex waveforms or receiving and demodulating complex waveform/pulses, the CrimzonTM ZLR32300 offers a new intelligent counter/timer architecture with 8-bit and 16-bit counter/timers (see Figure 2). Also included are a large number of user-selectable modes and two on-board comparators to process analog signals with separate reference voltages. All signals with an overline, “ ”, are active Low. For example, B/W, in which WORD is active Low, and B/W, in which BYTE is active Low. Power connections use the conventional descriptions listed in Table 3. Table 3. Power Connections Connection Circuit Device Power VCC VDD Ground GND VSS Note: |
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