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GS72108ATP/J
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 10/2004
2/12
© 2001, GSI Technology
TSOP-II 256K x 8-Pin Configuration
Package TP
Block Diagram
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
A4
A3
A2
A1
A0
CE
DQ1
DQ2
VDD
VSS
DQ3
DQ4
WE
NC
A5
A6
A7
A8
OE
DQ8
DQ7
VSS
VDD
DQ6
DQ5
A10
A11
A12
NC
44-pin
400 mil TSOP II
19
20
26
25
NC
21
22
NC
NC
24
23
NC
NC
1
2
NC
NC
44
43
NC
NC
A9
A13
A17
A16
A15
A14
Memory Array
Row
Decoder
Column
Decoder
Address
Input
Buffer
Control
I/O Buffer
A0
CE
WE
OE
DQ1
A17
DQ8