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PE3240 Datasheet(PDF) 3 Page - Peregrine Semiconductor Corp. |
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PE3240 Datasheet(HTML) 3 Page - Peregrine Semiconductor Corp. |
3 / 12 page Product Specification PE3240 Page 3 of 12 Document No. 70-0034-02 │ www.psemi.com ©2006 Peregrine Semiconductor Corp. All rights reserved. Table 1. Pin Descriptions (continued) Pin No. Pin Name Type Description Note 1: VDD pins 1, 9, and 16 are connected by diodes and must be supplied with the same positive voltage level. Table 2. Absolute Maximum Ratings Table 3. Operating Ratings Table 4. ESD Ratings Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating in Table 4. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Note 1: Periodically sampled, not 100% tested. Tested per MIL-STD-883, M3015 C2 17 PD_ D Output PD_ D pulses down when f p leads fc. 18 PD_ U Output PD_ U pulses down when f c leads fp. 19 GND Ground. 20 fr Input Reference frequency input. Symbol Parameter/Conditions Min Max Units VDD Supply voltage -0.3 4.0 V VI Voltage on any input -0.3 VDD + 0.3 V II DC into any input -10 +10 mA IO DC into any output -10 +10 mA Tstg Storage temperature range -65 150 °C Symbol Parameter/Conditions Min Max Units VDD Supply voltage 2.85 3.15 V TA Operating ambient temperature range -40 85 °C Symbol Parameter/Conditions Level Units VESD ESD voltage human body model (Note 1) 1000 V |
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