PECL Digital Video Clock Source

MDS 664-02 C

2

Revision 062304

Integrated Circuit Systems, Inc.

ICS664-02

Pin Assignment

16-pin 4.40 mil body, 0.65 mm pitch TSSOP

Output Clock Selection Table

Pin Descriptions

12

1

11

2

10

X1/REFIN

X2

3

9

VDD

4

VDD

VDDO

5

S0

6

CLK

7

GND

8

GND

CLK

GND

SELIN

S3

VDD

S2

S1

16

15

14

13

S3

S2

S1

S0

Input

Frequency

(MHz)

Output

Frequency

(MHz)

0000

Power down

0001

Pass thru

Input Freq

0010

27

74.25

0011

27

74.175824

0100

13.5

74.25

0101

13.5

74.175824

0110

RESERVED

RESERVED

0111

RESERVED

RESERVED

1000

74.25

54

1001

74.175824

54

1010

RESERVED

RESERVED

1011

RESERVED

RESERVED

1100

54

74.25

1101

54

74.175824

1110

54

13.5

1111

27

13.5

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

X1/REFIN

Input

Connect this pin to a crystal or clock input

2

VDD

Power

Power supply for crystal oscillator.

3

VDD

Power

Power supply for PLL.

4

S0

Input

Output frequency selection. Determines output frequency per table above. On chip pull-up.

5

GND

Power

Ground for PLL.

6

GND

Power

Ground for oscillator.

7

S3

Input

Output frequency selection. Determines output frequency per table above. On chip pull-up.

8

S2

Input

Output frequency selection. Determines output frequency per table above. On chip pull-up.

9

S1

Input

Output frequency selection. Determines output frequency per table above. On chip pull-up.

10

VDD

Power

Power supply.

11

SELIN

Input

Low for clock input, high for crystal. On chip pull-up.

12

GND

Power

Ground for output stage

13

CLK

Output

Complimentary clock output.

14

CLK

Output

Clock output.

15

VDDO

Power

Power supply for output stage.

16

X2

Input

Connect this pin to a crystal. Leave open if using a clock input.