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ICS85314AM01 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS85314AM01 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 15 page 85314AG-01 www.icst.com/products/hiperclocks.html REV. B JUNE 21, 2002 1 Integrated Circuit Systems, Inc. ICS85314-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER PRELIMINARY GENERAL DESCRIPTION The ICS85314-01 is a low skew, high performance 1-to-5 Differential-to-3.3V LVPECL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS85314-01 has two selectable clock inputs. The CLK0, nCLK0 pair can accept most standard differential input levels. The single-ended CLK1 can accept LVCMOS or LVTTL input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchro- nous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the ICS85314-01 ideal for those applications demanding well defined performance and repeatability. FEATURES • 5 differential 2.5V/3.3V LVPECL outputs • Selectable differential CLK0, nCLK0 or LVCMOS inputs • CLK0, nCLK0 pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • CLK1 can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 650MHz • Translates any single-ended input signal to 3.3V LVPECL levels with resistor bias on nCLK input • Output skew: 50ps (maximum) • Part-to-part skew: 400ps (maximum) • Propagation delay: CLK0, nCLK0 - 2.1ns (maximum) CLK1 - 2.1ns (maximum) • LVPECL mode operating voltage supply range: V CC = 2.375V to 3.8V, VEE = 0V • -40°C to 85°C ambient operating temperature • Compatible to part number MC100LVEL14 BLOCK DIAGRAM PIN ASSIGNMENT Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC nCLK_EN VCC nc CLK1 CLK0 nCLK0 nc CLK_SEL VEE HiPerClockS™ ,&6 ICS85314-01 20-Lead TSSOP 6.5mm x 4.4mm x 0.92mm Package Body G Package Top View ICS85314-01 20-Lead SOIC 7.5mm x 12.8mm x 2.3mm Package Body M Package Top View CLK0 nCLK0 CLK1 Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 0 1 nCLK_EN CLK_SEL D Q LE 0 1 The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. |
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